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2015-06-03nv50/ir: avoid messing up arg1 of PFETCHIlia Mirkin1-2/+18
There can be scenarios where the "indirect" arg of a PFETCH becomes known, and so the code will attempt to propagate it. Use this opportunity to just fold it into the first argument, and prevent the load propagation pass from touching PFETCH further. This fixes gs-input-array-vec4-index-rd.shader_test and vs-output-array-vec4-index-wr-before-gs.shader_test on nvc0 at least. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de> Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org> (cherry picked from commit fa7f9f123b70f313d3c073b52c9c16b4b8df28f8)
2015-06-03nvc0: a geometry shader can have up to 1024 vertices outputIlia Mirkin1-1/+1
The 1024 is already reported everywhere, not sure where this 0x1ff came from. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 921917c8d8e707dd854e7be05fba7a3e55bc71bf)
2015-06-03i965/fs: Fix implied_mrf_writes for scratch writesJason Ekstrand1-1/+1
We build the entire message in the generator so all the MRF writes are implied. Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 6ca67f62e885f0e42c0cef2db5c0ae837adfe646)
2015-06-03nvc0/ir: LOAD's can't be used for shader inputsIlia Mirkin2-0/+2
We forgot to convert to VFETCH in case of indirect access. Fix that. This avoids crashes on the new gs-input-array-vec4-index-rd and vs-output-array-vec4-index-wr-before-gs but they still fail. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 217301843aea0299ab245e260b20af7ad250e9d8)
2015-06-03nv50/ir: guess that the constant offset is the starting slot of arrayIlia Mirkin1-2/+4
When we get something like IN[ADDR[0].x+5], we will now guess that we should look at IN[5] for the "base" information. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 0bab3962f5f313ea829c95920c02f32afb23715d)
2015-06-03nvc0/ir: set ftz when sources are floats, not just destinationsIlia Mirkin1-3/+2
In the case of a compare, the destination might be a predicate, but we still want to flush denorms. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org> (cherry picked from commit d1eea18a595a468dbc2267a8d14197a3b1a5a4b6)
2015-06-03get-pick-list.sh: Require explicit "10.5" for nominating stable patchesEmil Velikov1-1/+1
A nomination unadorned with a specific version is now interpreted as being aimed at the 10.6 branch, which was recently opened. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-24docs: Add sha256sums for the 10.5.6 releaseEmil Velikov1-1/+2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-23Add release notes for the 10.5.6 releaseEmil Velikov1-0/+146
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-23Update version to 10.5.6Emil Velikov1-1/+1
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-20targets/osmesa: drop the -module tag from LDFLAGSEmil Velikov1-1/+0
Gallium equivalent of commit 06ff751f97f(darwin: Fix install name of libOSMesa) Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> (cherry picked from commit 36438f0db6c7c696df73ced12684f4df9d2b47e5)
2015-05-20darwin: Fix install name of libOSMesaJeremy Huddleston Sequoia1-1/+0
Passing -module to glibtool causes the resulting library to be called libSomething.so rather than libSomething.dylib on darwin. Regardless if libOSMesa is a library or a module, it has been used as the former for quite some time. Update the build to reflect that and resolve the naming issue. Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org> Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com> [Emil Velikov: Tweak the commit message.] Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> (cherry picked from commit 06ff751f97fbeb62a23936cd8f9c54733920d082)
2015-05-20swrast: Build fix for darwinJeremy Huddleston Sequoia2-0/+19
Fixes regression from commit 64b1dc44495890cbc2c7c5509cb830264020998c Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90147 Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com> Reviewed-by: Brian Paul <brianp@vmware.com> CC: Emil Velikov <emil.l.velikov@gmail.com> CC: jon.turney@dronecode.org.uk CC: ionic@macports.org (cherry picked from commit 5b2d3480f57168d50ad24cf0b8c9244414bd3701) Nominated-by: Emil Velikov <emil.l.velikov@gmail.com> Squashed with commit swrast: Build fix for Solaris Fixes regression from commit 5b2d3480f57168d50ad24cf0b8c9244414bd3701 Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org> Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com> Reviewed-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com> (cherry picked from commit 31cd2d75dc3844e40143f649fe383de17c152a13)
2015-05-20egl/main: fix EGL_KHR_get_all_proc_addressesEmil Velikov1-3/+3
The extension requires that the address of the core functions should be available via eglGetProcAddress. Currently the list is guarded by _EGL_GET_CORE_ADDRESSES, which was only set for the scons (windows) build. Unconditionally enable it for all the builds (automake, android and haiku) considering that the extension is not platform specific and is always enabled. v2: Drop the _EGL_GET_CORE_ADDRESSES macro altogether. Cc: mesa-stable@lists.freedesktop.org Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> (cherry picked from commit 448e01b2918c76dfff8abfbd56a606fdff8c356c) Conflicts: src/egl/main/eglapi.c
2015-05-20freedreno: fix bug in tile/slot calculationRob Clark1-5/+4
This was causing corruption with hw binning on a306. Unlikely that it is a306 specific, but rather the smaller gmem size resulted in different tile configuration which was triggering the bug at certain resolutions. Signed-off-by: Rob Clark <robclark@freedesktop.org> Cc: "10.4" and "10.5" and "10.6" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 4925c35660b777ae6b33a1f87a2f74f3436c7c41)
2015-05-20freedreno: enable a306Rob Clark2-1/+2
Whitelist adreno 306 (as found in msm8916/apq8016). Works pretty much out of the box, although the smaller GMEM size requires more tiles to fit 1920x1080, so bump up the max # of tiles as well. Since it is just whitelist + trivial change, it makes sense to land on all the active release branches. Note that a305c ends up with gpu-id "306", hence a306 ends up with gpu-id of "307". Apparently that is what happens when you let the marketing dept name things. Cc: "10.4" and "10.5" and "10.6" <mesa-stable@lists.freedesktop.org> Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit fcc7d6323bbea489219225f467d59192d538e95f)
2015-05-20main: Complete error conditions for glInvalidate*Framebuffer.Laura Ekstrand1-1/+19
Signed-off-by: Fredrik Höglund <fredrik@kde.org> Reviewed-by: Fredrik Höglund <fredrik@kde.org> Reviewed-by: Adam Jackson <ajax@redhat.com> Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> (cherry picked from commit b4368ac09db75cea412121ada6c12af1414feb50)
2015-05-20main: Fix an error generated by FramebufferTextureLaura Ekstrand1-4/+13
gl*FramebufferTexture should generate GL_INVALID_VALUE when the texture doesn't exist. [Fredrik: Split this change out from the next commit] Signed-off-by: Fredrik Höglund <fredrik@kde.org> Reviewed-by: Fredrik Höglund <fredrik@kde.org> Reviewed-by: Adam Jackson <ajax@redhat.com> Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 69bdc9dcb8e5d3648e8d96029d5988b8971de8dc)
2015-05-20mesa: Generate GL_INVALID_VALUE in framebuffer_texture when layer < 0Fredrik Höglund1-0/+12
Signed-off-by: Fredrik Höglund <fredrik@kde.org> Reviewed-by: Adam Jackson <ajax@redhat.com> Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 8ba7ad8abc7d71131e17970203c991ccb1befbe6)
2015-05-20main: Require that the texture exists in framebuffer_textureFredrik Höglund1-1/+1
Generate GL_INVALID_OPERATION if the texture hasn't been created. Signed-off-by: Fredrik Höglund <fredrik@kde.org> Reviewed-by: Adam Jackson <ajax@redhat.com> Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> (cherry picked from commit f9f5c822845698482d0d81eaa64bc13c2fd8852a)
2015-05-20i965: Fix PBO cache coherency issue after _mesa_meta_pbo_GetTexSubImage().Francisco Jerez2-2/+31
This problem can easily be reproduced with a number of ARB_shader_image_load_store piglit tests, which use a buffer object as PBO for a pixel transfer operation and later on bind the same buffer to the pipeline as shader image -- The problem is not exclusive to images though, and is likely to affect other kinds of buffer objects that can be bound to the 3D pipeline, including vertex, index, uniform, atomic counter buffers, etc. CC: 10.5 <mesa-stable@lists.freedesktop.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com> (cherry picked from commit d247615e0d67a7c8eaeea3fece837229c8c9658c)
2015-05-20nvc0: switch mechanism for shader eviction to be a while loopIlia Mirkin1-5/+6
This aligns it to work similarly to nv50. However there's no library code there, so the whole thing can be freed. Here we end up with an allocated node that's not attached to a specific program. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86792 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit d06ce2f1df54edd234b1abde37bba524ed599acb)
2015-05-20radeonsi: add new bonaire pci idAlex Deucher1-0/+1
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit 71ba30f7788167c04d0968d286a387fce16afcce)
2015-05-20clover: Implement locking of the wait_count, _chain and _status members of ↵Francisco Jerez1-0/+8
event. Tested-by: Tom Stellard <thomas.stellard@amd.com> CC: 10.5 <mesa-stable@lists.freedesktop.org> (cherry picked from commit a533d4edf1ea346dd9e343c71b2cd500fa550ef8)
2015-05-20clover: Wrap event::_status in a method to prevent unlocked access.Francisco Jerez2-7/+12
Tested-by: Tom Stellard <thomas.stellard@amd.com> CC: 10.5 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 4022a468b2976c65e0d2afe9c9ac5804729e8641)
2015-05-20clover: Refactor event::trigger and ::abort to prevent deadlock and ↵Francisco Jerez2-12/+34
reentrancy issues. Refactor ::trigger and ::abort to split out the operations that access concurrently modified data members and require locking from the recursive and possibly re-entrant part of these methods. This will avoid some deadlock situations when locking is implemented. Tested-by: Tom Stellard <thomas.stellard@amd.com> CC: 10.5 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 2232b929fd9ca6f00c8dab9dc45c386986be922d)
2015-05-20st/mesa: make sure to create a "clean" bool when doing i2bIlia Mirkin1-1/+1
i2b has to work for all integers, not just 1. INEG would not necessarily result with all bits set, which is something that other operations can rely on by e.g. using AND (or INEG for b2i). Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit 2b5355c8ab383d86bb6332dd29c417a6a1bc52bd)
2015-05-20clover: Fix a bug with multi-threaded events v2Tom Stellard2-3/+17
It was possible for some events never to get triggered if one thread was creating events and another threads was waiting for them. This patch consolidates soft_event::wait() and hard_event::wait() into event::wait() so that hard_event objects will now wait for all their dependencies to be submitted before flushing the command queue. v2: - Rename variables - Use mutable varibales so we can keep event::wait() const - Open code signalled() call so mutex can be atted to signalled without deadlocking. CC: 10.5 <mesa-stable@lists.freedesktop.org> Reviewed-by: Francisco Jerez <currojerez@riseup.net> (cherry picked from commit 9c4dc98b298c74015f2a7c21571bccf0a5b6cc98)
2015-05-20clover: Add a mutex to guard queue::queued_eventsTom Stellard2-0/+4
This fixes a potential crash where on a sequence like this: Thread 0: Check if queue is not empty. Thread 1: Remove item from queue, making it empty. Thread 0: Do something assuming queue is not empty. CC: 10.5 <mesa-stable@lists.freedesktop.org> Reviewed-by: Francisco Jerez <currojerez@riseup.net> (cherry picked from commit f546902d9597429713c83e2caf6b69856bd7ba4d)
2015-05-20glx/dri3: Add additional check for gpu offloading caseAxel Davy1-0/+5
Checks blitImage is implemented. Initially having the __DRIimageExtension extension at version 9 at least meant blitImage was supported. However some implementation do advertise version >= 9 without implementing it. CC: 10.5 <mesa-stable@lists.freedesktop.org> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Signed-off-by: Axel Davy <axel.davy@ens.fr> (cherry picked from commit c4ff6d00cd7dde4646ff96733f68d3ddbf540c2c)
2015-05-20egl/wayland: properly destroy wayland objectsAxel Davy2-1/+6
the wl_registry and the wl_queue allocated weren't destroyed. CC: 10.5 <mesa-stable@lists.freedesktop.org> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Signed-off-by: Axel Davy <axel.davy@ens.fr> (cherry picked from commit 6aaf09b93b668a24b557e05195b9897e8cee8559)
2015-05-20main: glGetIntegeri_v fails for GL_VERTEX_BINDING_STRIDEMarta Lofstedt1-0/+1
The return type for GL_VERTEX_BINDING_STRIDE is missing, this cause glGetIntegeri_v to fail. Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 4a8cd2799c2467b9916dd0ba672f05a394aa9b9f)
2015-05-20nv50/ir: only enable mul saturate on G200+Ilia Mirkin1-1/+4
Commit 44673512a84 enabled support for saturating fmul. However experimentally this does not seem to work on the older chips. Restrict the feature to G200 (NVA0) and later. Reported-by: Pierre Moreau <pierre.morrow@free.fr> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90350 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Tested-by: Pierre Moreau <pierre.morrow@free.fr> Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit da136dc07ddb6147d181c96f475b94f6281efd73)
2015-05-20nvc0: reset the instanced elements state when doing blit using 3d engineIlia Mirkin1-0/+6
Since we update num_vtxelts here, we could otherwise end up with stale instancing information in the upper bits which wouldn't otherwise get reset. (Also we run the risk of the previous draw having set the first element as instanced.) This appears as one of the causes for the test pointed out in fdo#90363 to fail on nvc0. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90363 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit 7892210400e8f3bd14697c0a3dd56e98454a45df)
2015-05-20nvc0: keep track of PGRAPH state in nvc0_screenIlia Mirkin4-24/+34
See identical commit for nv50. Destroying the current context and then creating a new one or switching to another existing context would cause the "current" state to not be properly initialized, so we save it off in the screen. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit e9b1ea29bf1e8f09e83bd6358d0d2068053f09d4)
2015-05-20nv50: keep track of PGRAPH state in nv50_screenIlia Mirkin4-30/+36
Normally this is kept in nv50_context, and on switching the active context, the state is copied from the previous context. However when the last context is destroyed, this is lost, and a new context might later be created. When the currently-active context is destroyed, save its state in the screen, and restore it when setting the current context. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90363 Reported-by: Matteo Bruni <matteo.mystral@gmail.com> Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Tested-by: Matteo Bruni <matteo.mystral@gmail.com> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit f617029db3f8786d94c64f1a73c42b89b6d261fa)
2015-05-20nv50/ir: only propagate saturate up if some actual folding took placeIlia Mirkin1-1/+2
The former logic would copy the saturate up to any mul with an immediate if there was a subsequent mul with a saturate. However we only want to do that if we collapsed 2 muls by multiplying their immediates (or were able to put the immediate in as a post-multiplier). Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit c4ac09e30e2520b0ac6d403eb6c77f23e7f24f49)
2015-05-20draw: (trivial) fix out-of-bounds vector initializationRoland Scheidegger1-1/+1
Was off-by-one. llvm says inserting an element with an index higher than the number of elements yields undefined results. Previously such inserts were ignored but as of llvm revision 235854 the vector gets replaced with undef, causing failures. This fixes piglit gl-3.2-layered-rendering-gl-layer, as mentioned in https://llvm.org/bugs/show_bug.cgi?id=23424. Reviewed-by: Brian Paul <brianp@vmware.com> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit b8a1495106a8b70e9026b7798a5df2fb9737c55e)
2015-05-20mesa: fix shininess check for ffvertex_prog v2Tim Rowley1-1/+1
Switch to using VERT_BIT_GENERIC macro, as varying_vp_inputs is a bitmask. Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit ce01c0af70f2475fbbb1c3ab90d43a19047abc5c)
2015-05-11docs: Add sha256 sums for the 10.5.5 releaseEmil Velikov1-1/+2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-11Add release notes for the 10.5.5 releaseEmil Velikov1-0/+94
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-11Update version to 10.5.5Emil Velikov1-1/+1
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-05-05i965: Add XRGB8888 format to intel_screen_make_configsBoyan Ding1-1/+2
Some application, such as drm backend of weston, uses XRGB8888 config as default. i965 doesn't provide this format, but before commit 65c8965d, the drm platform of EGL takes ARGB8888 as XRGB8888. Now that commit 65c8965d makes EGL recognize format correctly so weston won't start because it can't find XRGB8888. Add XRGB8888 format to i965 just as other drivers do. Cc: mesa-stable@lists.freedesktop.org Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89689 Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> (cherry picked from commit 28090b30dd6b5977de085f48c620574214b6b4ba)
2015-05-05nv50/ir: fix asFlow() const helper for OP_JOINIlia Mirkin1-1/+1
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit db269ae495425849804fb1d05cfe42b0d3d304b3)
2015-05-05nvc0/ir: fix predicated PFETCH emissionIlia Mirkin2-2/+6
src1 would contain the predicate, which would get emitted as a register source by an undiscerning srcId helper. Work around this in the same way as in emitTEX. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit a9d08a250ada5fbd4e3f78f8e4119ec295d692cf) Squashed with commit nvc0/ir: fix predicated PFETCH for real Commit a9d08a250 accidentally didn't make use of the new src1 variable. Use it. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit 33f0d1138d6ffa4596d3deda68fa5ba9a3d7cf86)
2015-05-05gk110/ir: fix set with a register dest to not auto-set the abs flagIlia Mirkin1-1/+1
This was causing src0 to always have the absolute value flag set. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit 515ac907e68ae1485bd9c65d7351dfb3c3d1e33f)
2015-05-05r300: do not link against libdrm_intelEmil Velikov1-1/+1
Accidentally added since the introduction of the file. Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit b124dc2b70a1ba546d1ce46578036d263a4287fe)
2015-05-05nvc0/ir: flush denorms to zero in non-compute shadersIlia Mirkin2-1/+25
This will set the FTZ flag (flush denorms to zero) on all opcodes that can take it. This resolves issues in Unigine Heaven 4.0 where there were solid-filled boxes popping up. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89455 Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit 6fe0d4f0354418c6e68dd352996e9891ddd4dfd6)
2015-05-05i965: Disallow linear blits that are not cacheline aligned.Kenneth Graunke1-8/+19
The BLT engine on Gen8+ requires linear surfaces to be cacheline aligned. This restriction was added as part of converting the BLT to use 48-bit addressing. The main user, intel_emit_linear_blit, now handles this properly. But we might also have linear miptrees; just refuse to blit those. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88521 Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit 5957da1edb9ad504d8af83878c10c3a24e41fc6c)
2015-05-05i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.Kenneth Graunke1-8/+14
The BLT engine on Gen8+ requires linear surfaces to be cacheline aligned. This restriction was added as part of converting the BLT to use 48-bit addressing. intel_emit_linear_blit needs to handle blits that are not cacheline aligned, as we use it for arbitrary glBufferSubData calls and subrange mappings. Since intel_emit_linear_blit uses 1 byte per pixel, we can use the src/dst pixel X offset field to represent the unaligned portion, and subtract that from the address so it's cacheline aligned. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88521 Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit 8c17d53823c77ac1c56b0548e4e54f69a33285f1)
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