diff options
| author | Imre Deak <imre.deak@intel.com> | 2017-08-14 18:15:30 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2017-08-15 15:28:10 +0300 |
| commit | 9c3a16c887f0f8f62813d841f028eabc153581f3 (patch) | |
| tree | caf74602fcb01ea769822786c7afb83dd60ef078 /drivers/gpu/drm/i915/i915_gem_object.c | |
| parent | 0a445945be6d10c5e6fd5599a27e43b6a7fdf14d (diff) | |
drm/i915/hsw+: Add support for multiple power well regs
Future platforms increase the number of power wells which require
additional control registers. A convenient way to select the correct
register is to use the high bits of the power well ID as index. This
patch only prepares for this, while upcoming platform enabling patches
will add the actual new power well IDs and corresponding power well
control registers.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Rakshmi Bhatia <rakshmi.bhatia@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Rakshmi Bhatia <rakshmi.bhatia@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170814151530.24154-2-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_object.c')
0 files changed, 0 insertions, 0 deletions