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authorHuang Rui <ray.huang@amd.com>2020-08-27 17:33:32 -0400
committerAlex Deucher <alexander.deucher@amd.com>2020-10-05 15:15:28 -0400
commit5120cb54098210502b200b3c77f008def0f7609f (patch)
tree45a98d0323cd93ab3f99ec0eb5d0dedbb20a92bc /drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
parent6fbcb00c7984fa7d49af2c361453c0397cdea400 (diff)
drm/amdgpu: add TOC firmware support for apu (v3)
APU needs load toc firmware for gfx10 series on psp front door loading. v2: rebase against latest code v3: clarify error message Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/psp_v11_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/psp_v11_0.c33
1 files changed, 23 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index 6c5d9612abcb..f2d6b2518eee 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
@@ -109,20 +109,16 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
BUG();
}
- err = psp_init_sos_microcode(psp, chip_name);
- if (err)
- return err;
-
- if (adev->asic_type != CHIP_SIENNA_CICHLID &&
- adev->asic_type != CHIP_NAVY_FLOUNDER) {
- err = psp_init_asd_microcode(psp, chip_name);
- if (err)
- return err;
- }
switch (adev->asic_type) {
case CHIP_VEGA20:
case CHIP_ARCTURUS:
+ err = psp_init_sos_microcode(psp, chip_name);
+ if (err)
+ return err;
+ err = psp_init_asd_microcode(psp, chip_name);
+ if (err)
+ return err;
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
if (err) {
@@ -150,6 +146,12 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
case CHIP_NAVI10:
case CHIP_NAVI14:
case CHIP_NAVI12:
+ err = psp_init_sos_microcode(psp, chip_name);
+ if (err)
+ return err;
+ err = psp_init_asd_microcode(psp, chip_name);
+ if (err)
+ return err;
if (amdgpu_sriov_vf(adev))
break;
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
@@ -180,10 +182,21 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
break;
case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER:
+ err = psp_init_sos_microcode(psp, chip_name);
+ if (err)
+ return err;
err = psp_init_ta_microcode(&adev->psp, chip_name);
if (err)
return err;
break;
+ case CHIP_VANGOGH:
+ err = psp_init_asd_microcode(psp, chip_name);
+ if (err)
+ return err;
+ err = psp_init_toc_microcode(psp, chip_name);
+ if (err)
+ return err;
+ break;
default:
BUG();
}