summaryrefslogtreecommitdiff
path: root/MAINTAINERS
diff options
context:
space:
mode:
authorBenoît Thébaudeau <benoit@wsystem.com>2016-07-21 12:41:31 +0200
committerAlexandre Belloni <alexandre.belloni@free-electrons.com>2016-07-28 09:59:41 +0200
commitd3700b6b6479d25c646f7c34a6295872322e6410 (patch)
treef50dc7bde007828d6284a1e79d20d4611da11049 /MAINTAINERS
parentd522649e2686ec98eb03078583736fdcb4ef8880 (diff)
rtc: rv8803: Stop the clock while setting the time
According to the application manual of the RX8900, the RESET bit must be set to 1 to prevent a timer update while setting the time. This also resets the subsecond counter. The application manual of the RV-8803 does not mention such a requirement, and it says that the 100th Seconds register is cleared when writing to the Seconds register, but using the RESET bit for the RV-8803 too should not be an issue and is probably safer. This change also ensures that the RESET bit is initialized properly in all cases. Indeed, all the registers must be initialized if the voltage has been lower than VLOW2 (triggering V2F), but not low enough to trigger a POR. Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'MAINTAINERS')
0 files changed, 0 insertions, 0 deletions