diff options
| author | Kevin Wang <kevin1.wang@amd.com> | 2019-07-25 11:08:42 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-07-30 23:48:32 -0500 |
| commit | cb33363d0e85341c8781d9095341a981ab410a80 (patch) | |
| tree | c75fa9411691d96998a9bb5d51436a08aa2ff548 /drivers/gpu/drm/amd/powerplay | |
| parent | 6b294793e3846988ca1234c324ae256b25cee9cf (diff) | |
drm/amd/powerplay: add smu feature name support
add smu_get_feature_name support in smu.
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/smu_types.h | 109 |
3 files changed, 71 insertions, 52 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index fb967c6d5046..22b581ab8549 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -43,6 +43,19 @@ const char *smu_get_message_name(struct smu_context *smu, enum smu_message_type return __smu_message_names[type]; } +#undef __SMU_DUMMY_MAP +#define __SMU_DUMMY_MAP(fea) #fea +static const char* __smu_feature_names[] = { + SMU_FEATURE_MASKS +}; + +const char *smu_get_feature_name(struct smu_context *smu, enum smu_feature_mask feature) +{ + if (feature < 0 || feature > SMU_FEATURE_COUNT) + return "unknow smu feature"; + return __smu_feature_names[feature]; +} + int smu_get_smc_version(struct smu_context *smu, uint32_t *if_version, uint32_t *smu_version) { int ret = 0; diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h index 035f857922ec..ba2385026b89 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h @@ -805,5 +805,6 @@ int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_lev int smu_set_display_count(struct smu_context *smu, uint32_t count); bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type); const char *smu_get_message_name(struct smu_context *smu, enum smu_message_type type); +const char *smu_get_feature_name(struct smu_context *smu, enum smu_feature_mask feature); #endif diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_types.h b/drivers/gpu/drm/amd/powerplay/inc/smu_types.h index d42e3424e704..8793c8d0dc52 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/smu_types.h +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_types.h @@ -154,59 +154,64 @@ enum smu_clk_type { SMU_CLK_COUNT, }; +#define SMU_FEATURE_MASKS \ + __SMU_DUMMY_MAP(DPM_PREFETCHER), \ + __SMU_DUMMY_MAP(DPM_GFXCLK), \ + __SMU_DUMMY_MAP(DPM_UCLK), \ + __SMU_DUMMY_MAP(DPM_SOCCLK), \ + __SMU_DUMMY_MAP(DPM_UVD), \ + __SMU_DUMMY_MAP(DPM_VCE), \ + __SMU_DUMMY_MAP(ULV), \ + __SMU_DUMMY_MAP(DPM_MP0CLK), \ + __SMU_DUMMY_MAP(DPM_LINK), \ + __SMU_DUMMY_MAP(DPM_DCEFCLK), \ + __SMU_DUMMY_MAP(DS_GFXCLK), \ + __SMU_DUMMY_MAP(DS_SOCCLK), \ + __SMU_DUMMY_MAP(DS_LCLK), \ + __SMU_DUMMY_MAP(PPT), \ + __SMU_DUMMY_MAP(TDC), \ + __SMU_DUMMY_MAP(THERMAL), \ + __SMU_DUMMY_MAP(GFX_PER_CU_CG), \ + __SMU_DUMMY_MAP(RM), \ + __SMU_DUMMY_MAP(DS_DCEFCLK), \ + __SMU_DUMMY_MAP(ACDC), \ + __SMU_DUMMY_MAP(VR0HOT), \ + __SMU_DUMMY_MAP(VR1HOT), \ + __SMU_DUMMY_MAP(FW_CTF), \ + __SMU_DUMMY_MAP(LED_DISPLAY), \ + __SMU_DUMMY_MAP(FAN_CONTROL), \ + __SMU_DUMMY_MAP(GFX_EDC), \ + __SMU_DUMMY_MAP(GFXOFF), \ + __SMU_DUMMY_MAP(CG), \ + __SMU_DUMMY_MAP(DPM_FCLK), \ + __SMU_DUMMY_MAP(DS_FCLK), \ + __SMU_DUMMY_MAP(DS_MP1CLK), \ + __SMU_DUMMY_MAP(DS_MP0CLK), \ + __SMU_DUMMY_MAP(XGMI), \ + __SMU_DUMMY_MAP(DPM_GFX_PACE), \ + __SMU_DUMMY_MAP(MEM_VDDCI_SCALING), \ + __SMU_DUMMY_MAP(MEM_MVDD_SCALING), \ + __SMU_DUMMY_MAP(DS_UCLK), \ + __SMU_DUMMY_MAP(GFX_ULV), \ + __SMU_DUMMY_MAP(FW_DSTATE), \ + __SMU_DUMMY_MAP(BACO), \ + __SMU_DUMMY_MAP(VCN_PG), \ + __SMU_DUMMY_MAP(JPEG_PG), \ + __SMU_DUMMY_MAP(USB_PG), \ + __SMU_DUMMY_MAP(RSMU_SMN_CG), \ + __SMU_DUMMY_MAP(APCC_PLUS), \ + __SMU_DUMMY_MAP(GTHR), \ + __SMU_DUMMY_MAP(GFX_DCS), \ + __SMU_DUMMY_MAP(GFX_SS), \ + __SMU_DUMMY_MAP(OUT_OF_BAND_MONITOR), \ + __SMU_DUMMY_MAP(TEMP_DEPENDENT_VMIN), \ + __SMU_DUMMY_MAP(MMHUB_PG), \ + __SMU_DUMMY_MAP(ATHUB_PG), \ + +#undef __SMU_DUMMY_MAP +#define __SMU_DUMMY_MAP(feature) SMU_FEATURE_##feature##_BIT enum smu_feature_mask { - SMU_FEATURE_DPM_PREFETCHER_BIT, - SMU_FEATURE_DPM_GFXCLK_BIT, - SMU_FEATURE_DPM_UCLK_BIT, - SMU_FEATURE_DPM_SOCCLK_BIT, - SMU_FEATURE_DPM_UVD_BIT, - SMU_FEATURE_DPM_VCE_BIT, - SMU_FEATURE_ULV_BIT, - SMU_FEATURE_DPM_MP0CLK_BIT, - SMU_FEATURE_DPM_LINK_BIT, - SMU_FEATURE_DPM_DCEFCLK_BIT, - SMU_FEATURE_DS_GFXCLK_BIT, - SMU_FEATURE_DS_SOCCLK_BIT, - SMU_FEATURE_DS_LCLK_BIT, - SMU_FEATURE_PPT_BIT, - SMU_FEATURE_TDC_BIT, - SMU_FEATURE_THERMAL_BIT, - SMU_FEATURE_GFX_PER_CU_CG_BIT, - SMU_FEATURE_RM_BIT, - SMU_FEATURE_DS_DCEFCLK_BIT, - SMU_FEATURE_ACDC_BIT, - SMU_FEATURE_VR0HOT_BIT, - SMU_FEATURE_VR1HOT_BIT, - SMU_FEATURE_FW_CTF_BIT, - SMU_FEATURE_LED_DISPLAY_BIT, - SMU_FEATURE_FAN_CONTROL_BIT, - SMU_FEATURE_GFX_EDC_BIT, - SMU_FEATURE_GFXOFF_BIT, - SMU_FEATURE_CG_BIT, - SMU_FEATURE_DPM_FCLK_BIT, - SMU_FEATURE_DS_FCLK_BIT, - SMU_FEATURE_DS_MP1CLK_BIT, - SMU_FEATURE_DS_MP0CLK_BIT, - SMU_FEATURE_XGMI_BIT, - SMU_FEATURE_DPM_GFX_PACE_BIT, - SMU_FEATURE_MEM_VDDCI_SCALING_BIT, - SMU_FEATURE_MEM_MVDD_SCALING_BIT, - SMU_FEATURE_DS_UCLK_BIT, - SMU_FEATURE_GFX_ULV_BIT, - SMU_FEATURE_FW_DSTATE_BIT, - SMU_FEATURE_BACO_BIT, - SMU_FEATURE_VCN_PG_BIT, - SMU_FEATURE_JPEG_PG_BIT, - SMU_FEATURE_USB_PG_BIT, - SMU_FEATURE_RSMU_SMN_CG_BIT, - SMU_FEATURE_APCC_PLUS_BIT, - SMU_FEATURE_GTHR_BIT, - SMU_FEATURE_GFX_DCS_BIT, - SMU_FEATURE_GFX_SS_BIT, - SMU_FEATURE_OUT_OF_BAND_MONITOR_BIT, - SMU_FEATURE_TEMP_DEPENDENT_VMIN_BIT, - SMU_FEATURE_MMHUB_PG_BIT, - SMU_FEATURE_ATHUB_PG_BIT, + SMU_FEATURE_MASKS SMU_FEATURE_COUNT, }; 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