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authorAlex Deucher <alexander.deucher@amd.com>2019-07-25 22:28:58 -0500
committerAlex Deucher <alexander.deucher@amd.com>2019-07-30 23:48:32 -0500
commit354e6e14ef947f07055d3570b4bd7a33196b57f6 (patch)
treeafe834f58841bd230a63f973acf9c76a8ef2c237 /drivers/gpu/drm/amd/powerplay
parenta3a09142f43c456fff7ddbc0ac867af8979a368c (diff)
drm/amdgpu/powerplay: use proper revision id for navi
The PCI revision id determines the sku. Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay')
-rw-r--r--drivers/gpu/drm/amd/powerplay/navi10_ppt.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index 502067c354d2..bdb9be75c0be 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -23,6 +23,7 @@
#include "pp_debug.h"
#include <linux/firmware.h>
+#include <linux/pci.h>
#include "amdgpu.h"
#include "amdgpu_smu.h"
#include "atomfirmware.h"
@@ -1592,7 +1593,7 @@ static int navi10_set_peak_clock_by_device(struct smu_context *smu)
uint32_t sclk_freq = 0, uclk_freq = 0;
uint32_t uclk_level = 0;
- switch (adev->rev_id) {
+ switch (adev->pdev->revision) {
case 0xf0: /* XTX */
case 0xc0:
sclk_freq = NAVI10_PEAK_SCLK_XTX;