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authorAlex Deucher <alexander.deucher@amd.com>2014-01-16 10:39:17 -0500
committerAlex Deucher <alexander.deucher@amd.com>2014-01-16 10:39:17 -0500
commit394e83f94dc4098f2c96d38cfdfef0c24f856497 (patch)
tree4d7083fec7e1fc419e3f47d4fe74715aef7fe8a1
parent8d503af215132ea6e335d3965368e64413f64714 (diff)
drm/radeon: write gfx pg bases even when gfx pg is disabled
For consistency. These buffers aren't used when pg is disabled. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/radeon/si.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 626163ef483d..ce948e07e3d2 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -5486,6 +5486,9 @@ static void si_init_pg(struct radeon_device *rdev)
si_init_ao_cu_mask(rdev);
if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG) {
si_init_gfx_cgpg(rdev);
+ } else {
+ WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8);
+ WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
}
si_enable_dma_pg(rdev, true);
si_enable_gfx_cgpg(rdev, true);