diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2020-05-28 17:12:53 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2020-05-29 11:44:23 -0400 |
commit | e467ab869f5783cf93d4cf24c6ac647cc29d1fb5 (patch) | |
tree | 36017e228a4b300874e7225b9869916cac63ef1c | |
parent | 6206aa0f74e7d22ca43975bd8f2979cdfd128b40 (diff) |
drm/amdgpu: use IP discovery table for renoir
Rather than relying on gpu info firmware.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index c7c9e07962b9..623745b2d8b3 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c @@ -670,14 +670,25 @@ static uint32_t soc15_get_rev_id(struct amdgpu_device *adev) int soc15_set_ip_blocks(struct amdgpu_device *adev) { + int r; + /* Set IP register base before any HW register access */ switch (adev->asic_type) { case CHIP_VEGA10: case CHIP_VEGA12: case CHIP_RAVEN: - case CHIP_RENOIR: vega10_reg_base_init(adev); break; + case CHIP_RENOIR: + if (amdgpu_discovery) { + r = amdgpu_discovery_reg_base_init(adev); + if (r) { + DRM_WARN("failed to init reg base from ip discovery table, " + "fallback to legacy init method\n"); + vega10_reg_base_init(adev); + } + } + break; case CHIP_VEGA20: vega20_reg_base_init(adev); break; |