diff options
| author | Likun Gao <Likun.Gao@amd.com> | 2020-04-28 16:42:30 +0800 |
|---|---|---|
| committer | Yang Xiong <Yang.Xiong@amd.com> | 2020-06-05 17:23:13 +0800 |
| commit | c8c7fde0079b182084227bbdd662d68ae955f293 (patch) | |
| tree | 3b3d7b22a96498bd409ced025824bcf0e8d0eb23 | |
| parent | 78f9136c79290b77fefc9c600af75cf50f96cdcf (diff) | |
drm/amd/powerplay: support mclk socclk limit value set for sienna_cichlid.
Add support to force and unforce MCLK or SOCCLK to dpm limit value.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c index 667c912e47fd..ef8532ff8e30 100644 --- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c @@ -945,6 +945,8 @@ static int sienna_cichlid_force_dpm_limit_value(struct smu_context *smu, bool hi enum smu_clk_type clks[] = { SMU_GFXCLK, + SMU_MCLK, + SMU_SOCCLK, }; for (i = 0; i < ARRAY_SIZE(clks); i++) { @@ -970,6 +972,8 @@ static int sienna_cichlid_unforce_dpm_levels(struct smu_context *smu) enum smu_clk_type clks[] = { SMU_GFXCLK, + SMU_MCLK, + SMU_SOCCLK, }; for (i = 0; i < ARRAY_SIZE(clks); i++) { |