summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorTianci.Yin <tianci.yin@amd.com>2019-08-22 15:00:08 +0800
committerTianci.Yin <tianci.yin@amd.com>2019-09-18 18:11:32 +0800
commitb80d25e2339e49e5e1b79662bc035e2c585c6aa8 (patch)
treeb037e9c432ad7ff39a5766fe7745fe33377ad147
parent7cfd840964e69702e9c7f3f1348debd100650ce8 (diff)
drm/amdgpu/gfx10: update gfx golden settings
update registers: mmUTCL1_CTRL, Change-Id: Icb50fb35a427a50a06138b8b3715651eebe92b95 Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 4e6b48859aca..7901530d07f0 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -111,7 +111,7 @@ static const struct soc15_reg_golden golden_settings_gc_10_1[] =
SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CNTL, 0x60000010, 0x479c0010),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CGTT_CLK_CTRL, 0xfeff0fff, 0x40000100),
- SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0x00800000, 0x00800000)
+ SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0x00c00000, 0x00c00000)
};
static const struct soc15_reg_golden golden_settings_gc_10_0_nv10[] =