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authorCui, Flora <Flora.Cui@amd.com>2019-03-20 02:46:56 +0000
committerFlora Cui <flora.cui@amd.com>2019-03-22 10:01:44 +0800
commitb020bdc27fe6af2253ffc424947e92686efd03cf (patch)
tree80e392e933f549aadff853bf0cdea6f8f25cda1f
parent7a4144b2adfa9a7f9cc33f3145cd7bcacbaf1e6a (diff)
tests/amdgpu: minor fix for dispatch/draw test
1. clear cmd buffer 2. make amdgpu_memcpy_dispatch_test static 3. tab/space fix Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--tests/amdgpu/basic_tests.c20
1 files changed, 12 insertions, 8 deletions
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 71d0ebb9..510ccdeb 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -2238,6 +2238,7 @@ static void amdgpu_memset_dispatch_test(amdgpu_device_handle device_handle,
&bo_cmd, (void **)&ptr_cmd,
&mc_address_cmd, &va_cmd);
CU_ASSERT_EQUAL(r, 0);
+ memset(ptr_cmd, 0, bo_cmd_size);
r = amdgpu_bo_alloc_and_map(device_handle, bo_shader_size, 4096,
AMDGPU_GEM_DOMAIN_VRAM, 0,
@@ -2288,7 +2289,7 @@ static void amdgpu_memset_dispatch_test(amdgpu_device_handle device_handle,
ptr_cmd[i++] = 1;
while (i & 7)
- ptr_cmd[i++] = 0xffff1000; /* type3 nop packet */
+ ptr_cmd[i++] = 0xffff1000; /* type3 nop packet */
resources[0] = bo_dst;
resources[1] = bo_shader;
@@ -2344,9 +2345,9 @@ static void amdgpu_memset_dispatch_test(amdgpu_device_handle device_handle,
CU_ASSERT_EQUAL(r, 0);
}
-void amdgpu_memcpy_dispatch_test(amdgpu_device_handle device_handle,
- uint32_t ip_type,
- uint32_t ring)
+static void amdgpu_memcpy_dispatch_test(amdgpu_device_handle device_handle,
+ uint32_t ip_type,
+ uint32_t ring)
{
amdgpu_context_handle context_handle;
amdgpu_bo_handle bo_src, bo_dst, bo_shader, bo_cmd, resources[4];
@@ -2374,6 +2375,7 @@ void amdgpu_memcpy_dispatch_test(amdgpu_device_handle device_handle,
&bo_cmd, (void **)&ptr_cmd,
&mc_address_cmd, &va_cmd);
CU_ASSERT_EQUAL(r, 0);
+ memset(ptr_cmd, 0, bo_cmd_size);
r = amdgpu_bo_alloc_and_map(device_handle, bo_shader_size, 4096,
AMDGPU_GEM_DOMAIN_VRAM, 0,
@@ -2432,7 +2434,7 @@ void amdgpu_memcpy_dispatch_test(amdgpu_device_handle device_handle,
ptr_cmd[i++] = 1;
while (i & 7)
- ptr_cmd[i++] = 0xffff1000; /* type3 nop packet */
+ ptr_cmd[i++] = 0xffff1000; /* type3 nop packet */
resources[0] = bo_shader;
resources[1] = bo_src;
@@ -2860,7 +2862,8 @@ void amdgpu_memset_draw(amdgpu_device_handle device_handle,
AMDGPU_GEM_DOMAIN_GTT, 0,
&bo_cmd, (void **)&ptr_cmd,
&mc_address_cmd, &va_cmd);
- CU_ASSERT_EQUAL(r, 0);
+ CU_ASSERT_EQUAL(r, 0);
+ memset(ptr_cmd, 0, bo_cmd_size);
r = amdgpu_bo_alloc_and_map(device_handle, bo_dst_size, 4096,
AMDGPU_GEM_DOMAIN_VRAM, 0,
@@ -2889,7 +2892,7 @@ void amdgpu_memset_draw(amdgpu_device_handle device_handle,
i += amdgpu_draw_draw(ptr_cmd + i);
while (i & 7)
- ptr_cmd[i++] = 0xffff1000; /* type3 nop packet */
+ ptr_cmd[i++] = 0xffff1000; /* type3 nop packet */
resources[0] = bo_dst;
resources[1] = bo_shader_ps;
@@ -3013,6 +3016,7 @@ static void amdgpu_memcpy_draw(amdgpu_device_handle device_handle,
&bo_cmd, (void **)&ptr_cmd,
&mc_address_cmd, &va_cmd);
CU_ASSERT_EQUAL(r, 0);
+ memset(ptr_cmd, 0, bo_cmd_size);
r = amdgpu_bo_alloc_and_map(device_handle, bo_size, 4096,
AMDGPU_GEM_DOMAIN_VRAM, 0,
@@ -3060,7 +3064,7 @@ static void amdgpu_memcpy_draw(amdgpu_device_handle device_handle,
i += amdgpu_draw_draw(ptr_cmd + i);
while (i & 7)
- ptr_cmd[i++] = 0xffff1000; /* type3 nop packet */
+ ptr_cmd[i++] = 0xffff1000; /* type3 nop packet */
resources[0] = bo_dst;
resources[1] = bo_src;