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authorRodrigo Vivi <rodrigo.vivi@intel.com>2017-06-30 14:24:55 -0700
committerHawking Zhang <Hawking.Zhang@amd.com>2017-07-31 16:19:54 +0800
commite8ad2432e1d329be1589c4fe072e3cf38e1b97a0 (patch)
tree1a9d92488f7686fcd9451a4087cae1557e9c2e73
parent724994cd585b1ca183c497d9cac65bc852f40bde (diff)
intel/intel_chipset: Move IS_9XX below IS_GEN10.
No functional change. Just organizing the code so it gets clear for future platforms. Paulo deserves credits becuase he was the one that just noticed this IS_9XX was in the wrong position after CNL patches got introduced. Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
-rw-r--r--intel/intel_chipset.h18
1 files changed, 9 insertions, 9 deletions
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 770d21f0..3ff59ada 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -499,15 +499,6 @@
IS_GEMINILAKE(devid) || \
IS_COFFEELAKE(devid))
-#define IS_9XX(dev) (IS_GEN3(dev) || \
- IS_GEN4(dev) || \
- IS_GEN5(dev) || \
- IS_GEN6(dev) || \
- IS_GEN7(dev) || \
- IS_GEN8(dev) || \
- IS_GEN9(dev) || \
- IS_GEN10(dev))
-
#define IS_CNL_Y(devid) ((devid) == PCI_CHIP_CANNONLAKE_Y_GT2_0 || \
(devid) == PCI_CHIP_CANNONLAKE_Y_GT2_1 || \
(devid) == PCI_CHIP_CANNONLAKE_Y_GT2_2 || \
@@ -525,4 +516,13 @@
#define IS_GEN10(devid) (IS_CANNONLAKE(devid))
+#define IS_9XX(dev) (IS_GEN3(dev) || \
+ IS_GEN4(dev) || \
+ IS_GEN5(dev) || \
+ IS_GEN6(dev) || \
+ IS_GEN7(dev) || \
+ IS_GEN8(dev) || \
+ IS_GEN9(dev) || \
+ IS_GEN10(dev))
+
#endif /* _INTEL_CHIPSET_H */