summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAnusha Srivatsa <anusha.srivatsa@intel.com>2017-06-21 11:17:37 -0700
committerHawking Zhang <Hawking.Zhang@amd.com>2017-07-31 16:19:54 +0800
commit2aa21443c6bef5970e0b9802f119ada47b8e52c2 (patch)
tree2059c0771234a544151d045e7f36c84bc41d71c4
parent800c4ab88134e40ebf0cf5b8796cffb21020fb02 (diff)
intel: PCI Ids for U SKU in CFL
Add the PCI IDs for U SKU IN CFL by following the spec. v2: Update IDs Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
-rw-r--r--intel/intel_chipset.h12
1 files changed, 11 insertions, 1 deletions
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index fed5a0d8..891b50fc 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -228,6 +228,10 @@
#define PCI_CHIP_COFFEELAKE_S_GT2_3 0x3E96
#define PCI_CHIP_COFFEELAKE_H_GT2_1 0x3E9B
#define PCI_CHIP_COFFEELAKE_H_GT2_2 0x3E94
+#define PCI_CHIP_COFFEELAKE_U_GT3_1 0x3EA5
+#define PCI_CHIP_COFFEELAKE_U_GT3_2 0x3EA6
+#define PCI_CHIP_COFFEELAKE_U_GT3_3 0x3EA7
+#define PCI_CHIP_COFFEELAKE_U_GT3_4 0x3EA8
#define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \
(devid) == PCI_CHIP_I915_GM || \
@@ -469,8 +473,14 @@
#define IS_CFL_H(devid) ((devid) == PCI_CHIP_COFFEELAKE_H_GT2_1 || \
(devid) == PCI_CHIP_COFFEELAKE_H_GT2_2)
+#define IS_CFL_U(devid) ((devid) == PCI_CHIP_COFFEELAKE_U_GT3_1 || \
+ (devid) == PCI_CHIP_COFFEELAKE_U_GT3_2 || \
+ (devid) == PCI_CHIP_COFFEELAKE_U_GT3_3 || \
+ (devid) == PCI_CHIP_COFFEELAKE_U_GT3_4)
+
#define IS_COFFEELAKE(devid) (IS_CFL_S(devid) || \
- IS_CFL_H(devid))
+ IS_CFL_H(devid) || \
+ IS_CFL_U(devid))
#define IS_GEN9(devid) (IS_SKYLAKE(devid) || \
IS_BROXTON(devid) || \