From 223794505e64ab5aa215f4847822d66cd6f3450f Mon Sep 17 00:00:00 2001 From: Jesse Adkins Date: Wed, 4 Aug 2010 09:21:31 +0000 Subject: xfree86: Fix leaks in OpenConfigFile and OpenConfigDir [mattst88: fixed whitespace and a missing semicolon] Signed-off-by: Jesse Adkins Signed-off-by: Matt Turner (cherry picked from commit 18b62e0479f15e965611880ada6e0195367df025) --- hw/xfree86/parser/scan.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/xfree86/parser/scan.c b/hw/xfree86/parser/scan.c index 531214350..4163a3a6b 100644 --- a/hw/xfree86/parser/scan.c +++ b/hw/xfree86/parser/scan.c @@ -819,6 +819,7 @@ OpenConfigFile(const char *path, const char *cmdline, const char *projroot, } } + free(pathcopy); if (file) { configFiles[numFiles].file = file; configFiles[numFiles].path = strdup(filepath); @@ -927,6 +928,7 @@ OpenConfigDir(const char *path, const char *cmdline, const char *projroot, } } + free(pathcopy); return dirpath; } -- cgit v1.2.3 From 8d6e2e9906fb0389db2b777d9d8bc2373f537f88 Mon Sep 17 00:00:00 2001 From: Peter Hutterer Date: Fri, 23 Jul 2010 14:48:32 +1000 Subject: xfree86: fix compiler warning about implicied decl of DuplicateModule. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ../../../../hw/xfree86/common/xf86Xinput.c: In function ‘xf86AllocateInput’: ../../../../hw/xfree86/common/xf86Xinput.c:722: warning: implicit declaration of function ‘DuplicateModule’ ../../../../hw/xfree86/common/xf86Xinput.c:722: warning: nested extern declaration of ‘DuplicateModule’ ../../../../hw/xfree86/common/xf86Xinput.c:722: warning: assignment makes pointer from integer without a cast Signed-off-by: Peter Hutterer Reviewed-by: Adam Jackson Reviewed-by: Daniel Stone (cherry picked from commit 3cc5e4422430e9ca44615f3e63feccd2e5729046) --- hw/xfree86/common/xf86Xinput.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/xfree86/common/xf86Xinput.c b/hw/xfree86/common/xf86Xinput.c index bd77fe663..877eb0382 100644 --- a/hw/xfree86/common/xf86Xinput.c +++ b/hw/xfree86/common/xf86Xinput.c @@ -66,6 +66,7 @@ #include "xf86InPriv.h" #include "compiler.h" #include "extinit.h" +#include "loaderProcs.h" #ifdef DPMSExtension #include -- cgit v1.2.3 From 7c016917b0fb5ab06f04f48914f78591482abb12 Mon Sep 17 00:00:00 2001 From: Macpaul Lin Date: Tue, 21 Sep 2010 15:13:32 +0800 Subject: xfree86: nds32: add nds32 definition for vgaHW support. Add __nds32__ definitions for vgaHW support. Signed-off-by: Macpaul Lin Acked-by: Tiago Vignatti Signed-off-by: Keith Packard (cherry picked from commit 2b24b2bd859a4b4b8ccaf3b7d1b529dcda2d3b94) --- hw/xfree86/vgahw/vgaHW.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/xfree86/vgahw/vgaHW.h b/hw/xfree86/vgahw/vgaHW.h index 7e63492d8..b31c00739 100644 --- a/hw/xfree86/vgahw/vgaHW.h +++ b/hw/xfree86/vgahw/vgaHW.h @@ -174,7 +174,7 @@ typedef struct _vgaHWRec { #define BITS_PER_GUN 6 #define COLORMAP_SIZE 256 -#if defined(__powerpc__) || defined(__arm__) || defined(__s390__) +#if defined(__powerpc__) || defined(__arm__) || defined(__s390__) || defined(__nds32__) #define DACDelay(hw) /* No legacy VGA support */ #else #define DACDelay(hw) \ -- cgit v1.2.3 From dfef37797c79d767d156a356ad7ea69316d4f693 Mon Sep 17 00:00:00 2001 From: Macpaul Lin Date: Tue, 21 Sep 2010 15:13:33 +0800 Subject: xfree86: nds32: add nds32 support for compiler specific codes Add nds32 definitions and related assembly codes to compiler header files. Signed-off-by: Macpaul Lin Acked-by: Tiago Vignatti Signed-off-by: Keith Packard (cherry picked from commit 28e6de66b42062a885ba38416387f2dbc15707fd) --- hw/xfree86/common/compiler.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/xfree86/common/compiler.h b/hw/xfree86/common/compiler.h index ded71ee22..d037c8450 100644 --- a/hw/xfree86/common/compiler.h +++ b/hw/xfree86/common/compiler.h @@ -103,7 +103,7 @@ # if defined(NO_INLINE) || defined(DO_PROTOTYPES) # if !defined(__arm__) -# if !defined(__sparc__) && !defined(__sparc) && !defined(__arm32__) \ +# if !defined(__sparc__) && !defined(__sparc) && !defined(__arm32__) && !defined(__nds32__) \ && !(defined(__alpha__) && defined(linux)) \ && !(defined(__ia64__) && defined(linux)) \ @@ -114,7 +114,7 @@ extern _X_EXPORT unsigned int inb(unsigned short); extern _X_EXPORT unsigned int inw(unsigned short); extern _X_EXPORT unsigned int inl(unsigned short); -# else /* __sparc__, __arm32__, __alpha__*/ +# else /* __sparc__, __arm32__, __alpha__, __nds32__ */ extern _X_EXPORT void outb(unsigned long, unsigned char); extern _X_EXPORT void outw(unsigned long, unsigned short); @@ -123,7 +123,7 @@ extern _X_EXPORT unsigned int inb(unsigned long); extern _X_EXPORT unsigned int inw(unsigned long); extern _X_EXPORT unsigned int inl(unsigned long); -# endif /* __sparc__, __arm32__, __alpha__ */ +# endif /* __sparc__, __arm32__, __alpha__, __nds32__ */ # endif /* __arm__ */ # if defined(__powerpc__) && !defined(__OpenBSD__) -- cgit v1.2.3 From 5ae0c0cdb29dd35e0c10e6429e0df59f064a5c73 Mon Sep 17 00:00:00 2001 From: Macpaul Lin Date: Tue, 21 Sep 2010 15:13:34 +0800 Subject: xfree86: nds32: add nds32 support for compiler related mmio codes Add nds32 support for compiler related mmio codes. It includes byte-swap or non-swap operations. Signed-off-by: Macpaul Lin Acked-by: Tiago Vignatti Signed-off-by: Keith Packard (cherry picked from commit 58bd317e29f4abf7f950891339d2a6a78ddf7903) --- hw/xfree86/common/compiler.h | 410 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 410 insertions(+) diff --git a/hw/xfree86/common/compiler.h b/hw/xfree86/common/compiler.h index d037c8450..958f8d027 100644 --- a/hw/xfree86/common/compiler.h +++ b/hw/xfree86/common/compiler.h @@ -1018,6 +1018,355 @@ xf_outl(unsigned short port, unsigned int val) #define outw xf_outw #define outl xf_outl +# elif defined(__nds32__) + +/* + * Assume all port access are aligned. We need to revise this implementation + * if there is unaligned port access. For ldq_u, ldl_u, ldw_u, stq_u, stl_u and + * stw_u, they are assumed unaligned. + */ + +#define barrier() /* no barrier */ + +#define PORT_SIZE long + +static __inline__ unsigned char +xf86ReadMmio8(__volatile__ void *base, const unsigned long offset) +{ + return *(volatile unsigned char *)((unsigned char *)base + offset) ; +} + +static __inline__ void +xf86WriteMmio8(__volatile__ void *base, const unsigned long offset, + const unsigned int val) +{ + *(volatile unsigned char *)((unsigned char *)base + offset) = val ; + barrier(); +} + +static __inline__ void +xf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset, + const unsigned int val) +{ + *(volatile unsigned char *)((unsigned char *)base + offset) = val ; +} + +static __inline__ unsigned short +xf86ReadMmio16Swap(__volatile__ void *base, const unsigned long offset) +{ + unsigned long addr = ((unsigned long)base) + offset; + unsigned short ret; + + __asm__ __volatile__( + "lhi %0, [%1];\n\t" + "wsbh %0, %0;\n\t" + : "=r" (ret) + : "r" (addr)); + return ret; +} + +static __inline__ unsigned short +xf86ReadMmio16(__volatile__ void *base, const unsigned long offset) +{ + return *(volatile unsigned short *)((char *)base + offset) ; +} + +static __inline__ void +xf86WriteMmio16Swap(__volatile__ void *base, const unsigned long offset, + const unsigned int val) +{ + unsigned long addr = ((unsigned long)base) + offset; + + __asm__ __volatile__( + "wsbh %0, %0;\n\t" + "shi %0, [%1];\n\t" + : /* No outputs */ + : "r" (val), "r" (addr)); + barrier(); +} + +static __inline__ void +xf86WriteMmio16(__volatile__ void *base, const unsigned long offset, + const unsigned int val) +{ + *(volatile unsigned short *)((unsigned char *)base + offset) = val ; + barrier(); +} + +static __inline__ void +xf86WriteMmio16SwapNB(__volatile__ void *base, const unsigned long offset, + const unsigned int val) +{ + unsigned long addr = ((unsigned long)base) + offset; + + __asm__ __volatile__( + "wsbh %0, %0;\n\t" + "shi %0, [%1];\n\t" + : /* No outputs */ + : "r" (val), "r" (addr)); +} + +static __inline__ void +xf86WriteMmio16NB(__volatile__ void *base, const unsigned long offset, + const unsigned int val) +{ + *(volatile unsigned short *)((unsigned char *)base + offset) = val ; +} + +static __inline__ unsigned int +xf86ReadMmio32Swap(__volatile__ void *base, const unsigned long offset) +{ + unsigned long addr = ((unsigned long)base) + offset; + unsigned int ret; + + __asm__ __volatile__( + "lwi %0, [%1];\n\t" + "wsbh %0, %0;\n\t" + "rotri %0, %0, 16;\n\t" + : "=r" (ret) + : "r" (addr)); + return ret; +} + +static __inline__ unsigned int +xf86ReadMmio32(__volatile__ void *base, const unsigned long offset) +{ + return *(volatile unsigned int *)((unsigned char *)base + offset) ; +} + +static __inline__ void +xf86WriteMmio32Swap(__volatile__ void *base, const unsigned long offset, + const unsigned int val) +{ + unsigned long addr = ((unsigned long)base) + offset; + + __asm__ __volatile__( + "wsbh %0, %0;\n\t" + "rotri %0, %0, 16;\n\t" + "swi %0, [%1];\n\t" + : /* No outputs */ + : "r" (val), "r" (addr)); + barrier(); +} + +static __inline__ void +xf86WriteMmio32(__volatile__ void *base, const unsigned long offset, + const unsigned int val) +{ + *(volatile unsigned int *)((unsigned char *)base + offset) = val ; + barrier(); +} + +static __inline__ void +xf86WriteMmio32SwapNB(__volatile__ void *base, const unsigned long offset, + const unsigned int val) +{ + unsigned long addr = ((unsigned long)base) + offset; + + __asm__ __volatile__( + "wsbh %0, %0;\n\t" + "rotri %0, %0, 16;\n\t" + "swi %0, [%1];\n\t" + : /* No outputs */ + : "r" (val), "r" (addr)); +} + +static __inline__ void +xf86WriteMmio32NB(__volatile__ void *base, const unsigned long offset, + const unsigned int val) +{ + *(volatile unsigned int *)((unsigned char *)base + offset) = val ; +} + +# if defined(NDS32_MMIO_SWAP) +static __inline__ void +outb(unsigned PORT_SIZE port, unsigned char val) +{ + xf86WriteMmio8(IOPortBase, port, val); +} + +static __inline__ void +outw(unsigned PORT_SIZE port, unsigned short val) +{ + xf86WriteMmio16Swap(IOPortBase, port, val); +} + +static __inline__ void +outl(unsigned PORT_SIZE port, unsigned int val) +{ + xf86WriteMmio32Swap(IOPortBase, port, val); +} + +static __inline__ unsigned int +inb(unsigned PORT_SIZE port) +{ + return xf86ReadMmio8(IOPortBase, port); +} + +static __inline__ unsigned int +inw(unsigned PORT_SIZE port) +{ + return xf86ReadMmio16Swap(IOPortBase, port); +} + +static __inline__ unsigned int +inl(unsigned PORT_SIZE port) +{ + return xf86ReadMmio32Swap(IOPortBase, port); +} + +static __inline__ unsigned long ldq_u(unsigned long *p) +{ + unsigned long addr = (unsigned long)p; + unsigned int ret; + + __asm__ __volatile__( + "lmw.bi %0, [%1], %0, 0;\n\t" + "wsbh %0, %0;\n\t" + "rotri %0, %0, 16;\n\t" + : "=r" (ret) + : "r" (addr)); + return ret; +} + +static __inline__ unsigned long ldl_u(unsigned int *p) +{ + unsigned long addr = (unsigned long)p; + unsigned int ret; + + __asm__ __volatile__( + "lmw.bi %0, [%1], %0, 0;\n\t" + "wsbh %0, %0;\n\t" + "rotri %0, %0, 16;\n\t" + : "=r" (ret) + : "r" (addr)); + return ret; +} + +static __inline__ void stq_u(unsigned long val, unsigned long *p) +{ + unsigned long addr = (unsigned long)p; + + __asm__ __volatile__( + "wsbh %0, %0;\n\t" + "rotri %0, %0, 16;\n\t" + "smw.bi %0, [%1], %0, 0;\n\t" + : /* No outputs */ + : "r" (val), "r" (addr)); +} + +static __inline__ void stl_u(unsigned long val, unsigned int *p) +{ + unsigned long addr = (unsigned long)p; + + __asm__ __volatile__( + "wsbh %0, %0;\n\t" + "rotri %0, %0, 16;\n\t" + "smw.bi %0, [%1], %0, 0;\n\t" + : /* No outputs */ + : "r" (val), "r" (addr)); +} + +# else /* !NDS32_MMIO_SWAP */ +static __inline__ void +outb(unsigned PORT_SIZE port, unsigned char val) +{ + *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))) = val; + barrier(); +} + +static __inline__ void +outw(unsigned PORT_SIZE port, unsigned short val) +{ + *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))) = val; + barrier(); +} + +static __inline__ void +outl(unsigned PORT_SIZE port, unsigned int val) +{ + *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))) = val; + barrier(); +} +static __inline__ unsigned int +inb(unsigned PORT_SIZE port) +{ + return *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))); +} + +static __inline__ unsigned int +inw(unsigned PORT_SIZE port) +{ + return *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))); +} + +static __inline__ unsigned int +inl(unsigned PORT_SIZE port) +{ + return *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))); +} + +static __inline__ unsigned long ldq_u(unsigned long *p) +{ + unsigned long addr = (unsigned long)p; + unsigned int ret; + + __asm__ __volatile__( + "lmw.bi %0, [%1], %0, 0;\n\t" + : "=r" (ret) + : "r" (addr)); + return ret; +} + +static __inline__ unsigned long ldl_u(unsigned int *p) +{ + unsigned long addr = (unsigned long)p; + unsigned int ret; + + __asm__ __volatile__( + "lmw.bi %0, [%1], %0, 0;\n\t" + : "=r" (ret) + : "r" (addr)); + return ret; +} + + +static __inline__ void stq_u(unsigned long val, unsigned long *p) +{ + unsigned long addr = (unsigned long)p; + + __asm__ __volatile__( + "smw.bi %0, [%1], %0, 0;\n\t" + : /* No outputs */ + : "r" (val), "r" (addr)); +} + +static __inline__ void stl_u(unsigned long val, unsigned int *p) +{ + unsigned long addr = (unsigned long)p; + + __asm__ __volatile__( + "smw.bi %0, [%1], %0, 0;\n\t" + : /* No outputs */ + : "r" (val), "r" (addr)); +} +# endif /* NDS32_MMIO_SWAP */ + +# if (((X_BYTE_ORDER == X_BIG_ENDIAN) && !defined(NDS32_MMIO_SWAP)) || ((X_BYTE_ORDER != X_BIG_ENDIAN) && defined(NDS32_MMIO_SWAP))) +# define ldw_u(p) ((*(unsigned char *)(p)) << 8 | \ + (*((unsigned char *)(p)+1))) +# define stw_u(v,p) (*(unsigned char *)(p)) = ((v) >> 8); \ + (*((unsigned char *)(p)+1)) = (v) +# else +# define ldw_u(p) ((*(unsigned char *)(p)) | \ + (*((unsigned char *)(p)+1)<<8)) +# define stw_u(v,p) (*(unsigned char *)(p)) = (v); \ + (*((unsigned char *)(p)+1)) = ((v) >> 8) +# endif + +# define mem_barrier() /* XXX: nop for now */ +# define write_mem_barrier() /* XXX: nop for now */ + # else /* ix86 */ # if !defined(__SUNPRO_C) @@ -1338,6 +1687,67 @@ extern _X_EXPORT void xf86SlowBCopyToBus(unsigned char *, unsigned char *, int); # define MMIO_MOVE32(base, offset, val) \ xf86WriteMmio32Be(base, offset, (CARD32)(val)) +# elif defined(__nds32__) + /* + * we provide byteswapping and no byteswapping functions here + * with no byteswapping as default; when endianness of CPU core + * and I/O devices don't match, byte swapping is necessary + * drivers that need byteswapping should define NDS32_MMIO_SWAP + */ +# define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset) +# define MMIO_OUT8(base, offset, val) \ + xf86WriteMmio8(base, offset, (CARD8)(val)) +# define MMIO_ONB8(base, offset, val) \ + xf86WriteMmioNB8(base, offset, (CARD8)(val)) + +# if defined(NDS32_MMIO_SWAP) /* byteswapping */ +# define MMIO_IN16(base, offset) xf86ReadMmio16Swap(base, offset) +# define MMIO_IN32(base, offset) xf86ReadMmio32Swap(base, offset) +# define MMIO_OUT16(base, offset, val) \ + xf86WriteMmio16Swap(base, offset, (CARD16)(val)) +# define MMIO_OUT32(base, offset, val) \ + xf86WriteMmio32Swap(base, offset, (CARD32)(val)) +# define MMIO_ONB16(base, offset, val) \ + xf86WriteMmioNB16Swap(base, offset, (CARD16)(val)) +# define MMIO_ONB32(base, offset, val) \ + xf86WriteMmioNB32Swap(base, offset, (CARD32)(val)) +# else /* no byteswapping is the default */ +# define MMIO_IN16(base, offset) xf86ReadMmio16(base, offset) +# define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset) +# define MMIO_OUT16(base, offset, val) \ + xf86WriteMmio16(base, offset, (CARD16)(val)) +# define MMIO_OUT32(base, offset, val) \ + xf86WriteMmio32(base, offset, (CARD32)(val)) +# define MMIO_ONB16(base, offset, val) \ + xf86WriteMmioNB16(base, offset, (CARD16)(val)) +# define MMIO_ONB32(base, offset, val) \ + xf86WriteMmioNB32(base, offset, (CARD32)(val)) +# endif + +# define MMIO_MOVE32(base, offset, val) \ + xf86WriteMmio32(base, offset, (CARD32)(val)) + +#ifdef N1213_HC /* for NDS32 N1213 hardcore */ +static __inline__ void nds32_flush_icache(char *addr) +{ + __asm__ volatile ( + "isync %0;" + "msync;" + "isb;" + "cctl %0,L1I_VA_INVAL;" + "isb;" + : : "r"(addr) : "memory"); +} +#else +static __inline__ void nds32_flush_icache(char *addr) +{ + __asm__ volatile ( + "isync %0;" + "isb;" + : : "r"(addr) : "memory"); +} +#endif + # else /* !__alpha__ && !__powerpc__ && !__sparc__ */ # define MMIO_IN8(base, offset) \ -- cgit v1.2.3 From 560e4254997df26b6abaa93ca2f59bcf7f68d551 Mon Sep 17 00:00:00 2001 From: Adam Jackson Date: Mon, 27 Sep 2010 17:06:46 -0400 Subject: xfree86: Add 18bpp support Signed-off-by: Adam Jackson Reviewed-by: Keith Packard Signed-off-by: Keith Packard (cherry picked from commit 9df4fb0adf66fb82f0c007897d79af0f54a6dad9) --- hw/xfree86/common/xf86Helper.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/xfree86/common/xf86Helper.c b/hw/xfree86/common/xf86Helper.c index 07f9f0a52..724c1a1fd 100644 --- a/hw/xfree86/common/xf86Helper.c +++ b/hw/xfree86/common/xf86Helper.c @@ -776,6 +776,9 @@ xf86SetWeight(ScrnInfoPtr scrp, rgb weight, rgb mask) scrp->weight.red = scrp->weight.blue = 5; scrp->weight.green = 6; break; + case 18: + scrp->weight.red = scrp->weight.green = scrp->weight.blue = 6; + break; case 24: scrp->weight.red = scrp->weight.green = scrp->weight.blue = 8; break; -- cgit v1.2.3