summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorZhenyu Wang <zhenyuw@linux.intel.com>2010-09-30 10:58:49 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2010-09-30 11:02:22 +0800
commit345c963e443ec325f1ff530512a356ddb318ff70 (patch)
treee90d1cabae15955d1eaf73436206682e0f34eb05
parentd4c013cb9d92d2959c9a98eca20e43ab14ae22e3 (diff)
Always use tiling on Sandybridge
Sandybridge requires kind of buffer must be tiling, like depth. And we would or have all tiling cases handled fine. So not allow user to turn off tiling on Sandybridge+ may be fine. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
-rw-r--r--src/intel_driver.c2
-rw-r--r--src/intel_driver.h2
2 files changed, 3 insertions, 1 deletions
diff --git a/src/intel_driver.c b/src/intel_driver.c
index d086d941..79c850b5 100644
--- a/src/intel_driver.c
+++ b/src/intel_driver.c
@@ -601,7 +601,7 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
intel->tiling = TRUE;
/* Allow user override if they set a value */
- if (xf86IsOptionSet(intel->Options, OPTION_TILING)) {
+ if (!ALWAYS_TILING(intel) && xf86IsOptionSet(intel->Options, OPTION_TILING)) {
if (xf86ReturnOptValBool(intel->Options, OPTION_TILING, FALSE))
intel->tiling = TRUE;
else
diff --git a/src/intel_driver.h b/src/intel_driver.h
index b55c8c96..31b30090 100644
--- a/src/intel_driver.h
+++ b/src/intel_driver.h
@@ -264,6 +264,8 @@
/* supports Y tiled surfaces (pre-965 Mesa isn't ready yet) */
#define SUPPORTS_YTILING(pI810) (IS_I965G(intel))
+#define ALWAYS_TILING(intel) (IS_GEN6(intel))
+
extern SymTabRec *intel_chipsets;
struct intel_chipset {