diff options
author | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2007-09-06 10:34:01 +0800 |
---|---|---|
committer | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2007-09-06 10:34:01 +0800 |
commit | 8ffa0028fa54828f039af23f36a7f9f4554fa79b (patch) | |
tree | 8c394a15cf3982ec1ec569039e3d60ea7fec7168 | |
parent | 79854ed906e278275b25444fb56882b83470f5ea (diff) | |
parent | 02ad9cee330fb5fb0008ad6f74e74e8d8a1fc36e (diff) |
Merge branch 'xvmc-i915' of git+ssh://zhen@git.freedesktop.org/git/xorg/driver/xf86-video-intel into xvmc-i915
-rw-r--r-- | configure.ac | 10 | ||||
-rw-r--r-- | man/intel.man | 2 | ||||
-rw-r--r-- | src/Makefile.am | 1 | ||||
-rw-r--r-- | src/bios_reader/bios_dumper.c | 3 | ||||
-rw-r--r-- | src/i810.h | 4 | ||||
-rw-r--r-- | src/i810_reg.h | 12 | ||||
-rw-r--r-- | src/i830.h | 15 | ||||
-rw-r--r-- | src/i830_bios.h | 3 | ||||
-rw-r--r-- | src/i830_display.c | 234 | ||||
-rw-r--r-- | src/i830_driver.c | 11 | ||||
-rw-r--r-- | src/i830_exa.c | 102 | ||||
-rw-r--r-- | src/i830_lvds.c | 117 | ||||
-rw-r--r-- | src/i830_memory.c | 5 | ||||
-rw-r--r-- | src/i830_quirks.c | 84 | ||||
-rw-r--r-- | src/i830_reg.h | 7 | ||||
-rw-r--r-- | src/i830_tv.c | 3 | ||||
-rw-r--r-- | src/i830_video.c | 23 | ||||
-rw-r--r-- | src/i830_video.h | 1 | ||||
-rw-r--r-- | src/i830_xaa.c | 2 | ||||
-rw-r--r-- | src/i915_hwmc.c | 302 | ||||
-rw-r--r-- | src/i915_hwmc.h | 36 | ||||
-rw-r--r-- | src/i965_render.c | 16 | ||||
-rw-r--r-- | src/xvmc/I915XvMC.c | 224 | ||||
-rw-r--r-- | src/xvmc/I915XvMC.h | 61 |
24 files changed, 590 insertions, 688 deletions
diff --git a/configure.ac b/configure.ac index 9b76b652..8c2b5ec6 100644 --- a/configure.ac +++ b/configure.ac @@ -26,16 +26,6 @@ AC_INIT([xf86-video-intel], [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg], xf86-video-intel) -AC_DEFINE_UNQUOTED([INTEL_VERSION_MAJOR], - [$(echo $PACKAGE_VERSION | sed -e 's/^\([[0-9]]*\)\.[[0-9]]*\.[[0-9]]*/\1/')], - [Major version]) -AC_DEFINE_UNQUOTED([INTEL_VERSION_MINOR], - [$(echo $PACKAGE_VERSION | sed -e 's/^[[0-9]]*\.\([[0-9]]*\)\.[[0-9]]*/\1/')], - [Minor version]) -AC_DEFINE_UNQUOTED([INTEL_VERSION_PATCH], - [$(echo $PACKAGE_VERSION | sed -e 's/^[[0-9]]*\.[[0-9]]*\.\([[0-9]]*\)/\1/')], - [Patch version]) - AC_CONFIG_SRCDIR([Makefile.am]) AM_CONFIG_HEADER([config.h]) AC_CONFIG_AUX_DIR(.) diff --git a/man/intel.man b/man/intel.man index 33dc319e..5909fddc 100644 --- a/man/intel.man +++ b/man/intel.man @@ -141,7 +141,7 @@ and that is used with the 3D driver in Mesa from version 6.5.2 and upwards. If the size is set too high to make room for pre-allocated VideoRam, the driver will try to reduce it automatically. If you use only older Mesa or DRM versions, you may set this value to zero, and -atctivate the legacy texture pool (see +activate the legacy texture pool (see .B "Option \*qLegacy3D\*q" ). If you run 3D programs with large texture memory requirements, you might gain some performance by increasing this value. diff --git a/src/Makefile.am b/src/Makefile.am index 028dcfdd..845b5f0f 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -92,6 +92,7 @@ intel_drv_la_SOURCES = \ i830_debug.h \ i830_display.c \ i830_display.h \ + i830_quirks.c \ i830_driver.c \ i830_dvo.c \ i830.h \ diff --git a/src/bios_reader/bios_dumper.c b/src/bios_reader/bios_dumper.c index c0dbdcf8..6f163d56 100644 --- a/src/bios_reader/bios_dumper.c +++ b/src/bios_reader/bios_dumper.c @@ -29,6 +29,7 @@ #include <stdlib.h> #include <string.h> #include <stdarg.h> +#include <sys/stat.h> #include <fcntl.h> #include <errno.h> #include <pciaccess.h> @@ -80,7 +81,7 @@ int main(int argc, char **argv) exit(1); } - fd = open(argv[1], O_RDWR | O_CREAT | O_TRUNC); + fd = open(argv[1], O_RDWR | O_CREAT | O_TRUNC, DEFFILEMODE); if (fd < 0) { fprintf(stderr, "Couldn't open output: %s\n", strerror(errno)); exit(1); @@ -66,6 +66,10 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define I810_DRIVER_NAME "intel" #define I810_LEGACY_DRIVER_NAME "i810" +#define INTEL_VERSION_MAJOR PACKAGE_VERSION_MAJOR +#define INTEL_VERSION_MINOR PACKAGE_VERSION_MINOR +#define INTEL_VERSION_PATCH PACKAGE_VERSION_PATCHLEVEL + /* HWMC Surfaces */ #define I810_MAX_SURFACES 7 #define I810_MAX_SUBPICTURES 2 diff --git a/src/i810_reg.h b/src/i810_reg.h index 248df049..03e10d64 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -822,6 +822,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. # define PP_SEQUENCE_MASK 0x30000000 #define PP_CONTROL 0x61204 +# define POWER_DOWN_ON_RESET (1 << 1) # define POWER_TARGET_ON (1 << 0) #define LVDSPP_ON 0x61208 @@ -1066,6 +1067,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define BLC_PWM_CTL 0x61254 #define BACKLIGHT_MODULATION_FREQ_SHIFT (17) +#define BACKLIGHT_MODULATION_FREQ_SHIFT2 (16) /** * This is the most significant 15 bits of the number of backlight cycles in a * complete cycle of the modulated backlight control. @@ -1073,7 +1075,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * The actual value is this field multiplied by two. */ #define BACKLIGHT_MODULATION_FREQ_MASK (0x7fff << 17) +#define BACKLIGHT_MODULATION_FREQ_MASK2 (0xffff << 16) #define BLM_LEGACY_MODE (1 << 16) + /** * This is the number of cycles out of the backlight modulation cycle for which * the backlight is on. @@ -1084,6 +1088,10 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define BACKLIGHT_DUTY_CYCLE_SHIFT (0) #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) +/* On 965+ backlight control is in another register */ +#define BLC_PWM_CTL2 0x61250 +#define BLM_LEGACY_MODE2 (1 << 30) + #define BLM_CTL 0x61260 #define BLM_THRESHOLD_0 0x61270 #define BLM_THRESHOLD_1 0x61274 @@ -2021,6 +2029,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define DSPBCNTR 0x71180 #define DISPLAY_PLANE_ENABLE (1<<31) #define DISPLAY_PLANE_DISABLE 0 +#define DISPLAY_PLANE_TILED (1<<10) #define DISPPLANE_GAMMA_ENABLE (1<<30) #define DISPPLANE_GAMMA_DISABLE 0 #define DISPPLANE_PIXFORMAT_MASK (0xf<<26) @@ -2160,12 +2169,15 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define XY_COLOR_BLT_CMD ((2<<29)|(0x50<<22)|(0x4)) #define XY_COLOR_BLT_WRITE_ALPHA (1<<21) #define XY_COLOR_BLT_WRITE_RGB (1<<20) +#define XY_COLOR_BLT_TILED (1<<11) #define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1) #define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) #define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) +#define XY_SRC_COPY_BLT_SRC_TILED (1<<15) +#define XY_SRC_COPY_BLT_DST_TILED (1<<11) #define SRC_COPY_BLT_CMD ((2<<29)|(0x43<<22)|0x4) #define SRC_COPY_BLT_WRITE_ALPHA (1<<21) @@ -411,9 +411,8 @@ typedef struct _I830Rec { CloseScreenProcPtr CloseScreen; #ifdef I830_USE_EXA - unsigned int copy_src_pitch; - unsigned int copy_src_off; ExaDriverPtr EXADriverPtr; + PixmapPtr pSrcPixmap; #endif I830WriteIndexedByteFunc writeControl; @@ -538,6 +537,7 @@ typedef struct _I830Rec { CARD32 savePaletteB[256]; CARD32 saveSWF[17]; CARD32 saveBLC_PWM_CTL; + CARD32 saveBLC_PWM_CTL2; CARD32 saveFBC_CFB_BASE; CARD32 saveFBC_LL_BASE; CARD32 saveFBC_CONTROL2; @@ -547,6 +547,7 @@ typedef struct _I830Rec { /** Enables logging of debug output related to mode switching. */ Bool debug_modes; + unsigned int quirk_flag; } I830Rec; #define I830PTR(p) ((I830Ptr)((p)->driverPrivate)) @@ -746,8 +747,8 @@ static inline int i830_fb_compression_supported(I830Ptr pI830) } /* i915 XvMC */ -int I915XvMCInitXv(ScrnInfoPtr, XF86VideoAdaptorPtr); -void I915InitMC(ScreenPtr); +Bool I915XvMCInit(ScreenPtr, XF86VideoAdaptorPtr); +Bool I915XvMCScreenInit(ScreenPtr); unsigned long I915XvMCPutImageSize(ScrnInfoPtr); extern const int I830PatternROP[16]; @@ -762,4 +763,10 @@ extern const int I830CopyROP[16]; #define _845_DRAM_RW_CONTROL 0x90 #define DRAM_WRITE 0x33330000 +/* quirk flag definition */ +#define QUIRK_IGNORE_TV 0x00000001 +#define QUIRK_IGNORE_LVDS 0x00000002 +#define QUIRK_IGNORE_MACMINI_LVDS 0x00000004 +extern void i830_fixup_devices(ScrnInfoPtr); + #endif /* _I830_H_ */ diff --git a/src/i830_bios.h b/src/i830_bios.h index cb7666e3..9e8356a1 100644 --- a/src/i830_bios.h +++ b/src/i830_bios.h @@ -130,9 +130,6 @@ struct aimdb_block { CARD16 aimdb_size; } __attribute__((packed)); -struct vch_bdb_20 { -} __attribute__((packed)); - struct vch_panel_data { CARD16 fp_timing_offset; CARD8 fp_timing_size; diff --git a/src/i830_display.c b/src/i830_display.c index 26873fef..6fe7be74 100644 --- a/src/i830_display.c +++ b/src/i830_display.c @@ -498,6 +498,123 @@ i830_pipe_a_require_deactivate (ScrnInfoPtr scrn) return; } +static Bool +i830_use_fb_compression(xf86CrtcPtr crtc) +{ + ScrnInfoPtr pScrn = crtc->scrn; + I830Ptr pI830 = I830PTR(pScrn); + I830CrtcPrivatePtr intel_crtc = crtc->driver_private; + int pipe = intel_crtc->pipe; + int plane = (pipe == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB); + + if (!pI830->fb_compression) + return FALSE; + + /* Pre-965 only supports plane A */ + if (!IS_I965GM(pI830) && plane != FBC_CTL_PLANEA) + return FALSE; + + /* Need 15, 16, or 32 (w/alpha) pixel format */ + if (!(pScrn->bitsPerPixel == 16 || /* covers 15 bit mode as well */ + pScrn->bitsPerPixel == 32)) /* mode_set dtrt if fbc is in use */ + return FALSE; + + /* + * No checks for pixel multiply, incl. horizontal, or interlaced modes + * since they're currently unused. + */ + return TRUE; +} + +/* + * Several restrictions: + * - DSP[AB]CNTR - no line duplication && no pixel multiplier + * - pixel format == 15 bit, 16 bit, or 32 bit xRGB_8888 + * - no alpha buffer discard + * - no dual wide display + * - progressive mode only (DSP[AB]CNTR) + * - uncompressed fb is <= 2048 in width, 0 mod 8 + * - uncompressed fb is <= 1536 in height, 0 mod 2 + * - SR display watermarks must be equal between 16bpp and 32bpp? + * + * FIXME: verify above conditions are true + */ +static void +i830_enable_fb_compression(xf86CrtcPtr crtc) +{ + ScrnInfoPtr pScrn = crtc->scrn; + I830Ptr pI830 = I830PTR(pScrn); + I830CrtcPrivatePtr intel_crtc = crtc->driver_private; + uint32_t fbc_ctl = 0; + unsigned long compressed_stride; + int pipe = intel_crtc->pipe; + /* FIXME: plane & pipe might not always be equal */ + int plane = (pipe == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB); + unsigned long uncompressed_stride = pScrn->displayWidth * pI830->cpp; + unsigned long interval = 1000; + + if (INREG(FBC_CONTROL) & FBC_CTL_EN) { + char cur_pipe = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a'; + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "fbc already enabled on " + "pipe %c, not enabling on pipe %c\n", cur_pipe, pipe ? 'b' : + 'a'); + return; + } + + compressed_stride = pI830->compressed_front_buffer->size / + FBC_LL_SIZE; + + if (uncompressed_stride < compressed_stride) + compressed_stride = uncompressed_stride; + + /* FBC_CTL wants 64B units */ + compressed_stride = (compressed_stride / 64) - 1; + + /* Set it up... */ + /* Wait for compressing bit to clear */ + while (INREG(FBC_STATUS) & FBC_STAT_COMPRESSING) + ; /* nothing */ + i830WaitForVblank(pScrn); + OUTREG(FBC_CFB_BASE, pI830->compressed_front_buffer->bus_addr); + OUTREG(FBC_LL_BASE, pI830->compressed_ll_buffer->bus_addr + 6); + OUTREG(FBC_CONTROL2, FBC_CTL_FENCE_DBL | FBC_CTL_IDLE_FULL | + FBC_CTL_CPU_FENCE | plane); + + /* Zero buffers */ + memset(pI830->FbBase + pI830->compressed_front_buffer->offset, 0, + pI830->compressed_front_buffer->size); + memset(pI830->FbBase + pI830->compressed_ll_buffer->offset, 0, + pI830->compressed_ll_buffer->size); + + /* enable it... */ + fbc_ctl |= FBC_CTL_EN | FBC_CTL_PERIODIC; + fbc_ctl |= (compressed_stride & 0xff) << FBC_CTL_STRIDE_SHIFT; + fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT; + fbc_ctl |= FBC_CTL_UNCOMPRESSIBLE; + OUTREG(FBC_CONTROL, fbc_ctl); + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc enabled on plane %c\n", pipe ? + 'b' : 'a'); +} + +static void +i830_disable_fb_compression(xf86CrtcPtr crtc) +{ + ScrnInfoPtr pScrn = crtc->scrn; + I830Ptr pI830 = I830PTR(pScrn); + uint32_t fbc_ctl; + char pipe = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a'; + + /* Disable compression */ + fbc_ctl = INREG(FBC_CONTROL); + fbc_ctl &= ~FBC_CTL_EN; + OUTREG(FBC_CONTROL, fbc_ctl); + + /* Wait for compressing bit to clear */ + while (INREG(FBC_STATUS) & FBC_STAT_COMPRESSING) + ; /* nothing */ + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc disabled on pipe %c\n", pipe); +} /** * Sets the power management mode of the pipe and plane. @@ -561,8 +678,16 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode) /* Give the overlay scaler a chance to enable if it's on this pipe */ i830_crtc_dpms_video(crtc, TRUE); + + /* Reenable compression if needed */ + if (i830_use_fb_compression(crtc)) + i830_enable_fb_compression(crtc); break; case DPMSModeOff: + /* Shut off compression if in use */ + if (i830_use_fb_compression(crtc)) + i830_disable_fb_compression(crtc); + /* Give the overlay scaler a chance to disable if it's on this pipe */ i830_crtc_dpms_video(crtc, FALSE); @@ -656,112 +781,6 @@ i830_crtc_unlock (xf86CrtcPtr crtc) #endif } -static Bool -i830_use_fb_compression(xf86CrtcPtr crtc) -{ - ScrnInfoPtr pScrn = crtc->scrn; - I830Ptr pI830 = I830PTR(pScrn); - I830CrtcPrivatePtr intel_crtc = crtc->driver_private; - int pipe = intel_crtc->pipe; - int plane = (pipe == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB); - - if (!pI830->fb_compression) - return FALSE; - - /* Pre-965 only supports plane A */ - if (!IS_I965GM(pI830) && plane != FBC_CTL_PLANEA) - return FALSE; - - /* Need 15, 16, or 32 (w/alpha) pixel format */ - if (!(pScrn->bitsPerPixel == 16 || /* covers 15 bit mode as well */ - pScrn->bitsPerPixel == 32)) /* mode_set dtrt if fbc is in use */ - return FALSE; - - /* - * No checks for pixel multiply, incl. horizontal, or interlaced modes - * since they're currently unused. - */ - return TRUE; -} - -/* - * Several restrictions: - * - DSP[AB]CNTR - no line duplication && no pixel multiplier - * - pixel format == 15 bit, 16 bit, or 32 bit xRGB_8888 - * - no alpha buffer discard - * - no dual wide display - * - progressive mode only (DSP[AB]CNTR) - * - uncompressed fb is <= 2048 in width, 0 mod 8 - * - uncompressed fb is <= 1536 in height, 0 mod 2 - * - SR display watermarks must be equal between 16bpp and 32bpp? - * - * FIXME: verify above conditions are true - */ -static void -i830_enable_fb_compression(xf86CrtcPtr crtc) -{ - ScrnInfoPtr pScrn = crtc->scrn; - I830Ptr pI830 = I830PTR(pScrn); - I830CrtcPrivatePtr intel_crtc = crtc->driver_private; - uint32_t fbc_ctl; - unsigned long compressed_stride; - int pipe = intel_crtc->pipe; - int plane = (pipe == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB); - unsigned long uncompressed_stride = pScrn->displayWidth * pI830->cpp; - unsigned long interval = 1000; - - if (INREG(FBC_CONTROL) & FBC_CTL_EN) { - char cur_pipe = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a'; - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "fbc already enabled on " - "pipe %c, not enabling on pipe %c\n", cur_pipe, pipe ? 'b' : - 'a'); - return; - } - - compressed_stride = pI830->compressed_front_buffer->size / - FBC_LL_SIZE; - - if (uncompressed_stride < compressed_stride) - compressed_stride = uncompressed_stride; - - /* FBC_CTL wants 64B units */ - compressed_stride = (compressed_stride / 64) - 1; - - /* Set it up... */ - OUTREG(FBC_CFB_BASE, pI830->compressed_front_buffer->bus_addr); - OUTREG(FBC_LL_BASE, pI830->compressed_ll_buffer->bus_addr + FBC_LL_PAD); - OUTREG(FBC_CONTROL2, FBC_CTL_CPU_FENCE | plane); - - /* enable it... */ - fbc_ctl = INREG(FBC_CONTROL); - fbc_ctl |= FBC_CTL_EN | FBC_CTL_PERIODIC; - fbc_ctl |= (compressed_stride & 0xff) << FBC_CTL_STRIDE_SHIFT; - fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT; - OUTREG(FBC_CONTROL, fbc_ctl); - - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc enabled on pipe %c\n", pipe ? - 'b' : 'a'); -} - -static void -i830_disable_fb_compression(xf86CrtcPtr crtc) -{ - ScrnInfoPtr pScrn = crtc->scrn; - I830Ptr pI830 = I830PTR(pScrn); - uint32_t fbc_ctl; - char pipe = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a'; - - /* Disable compression */ - fbc_ctl = INREG(FBC_CONTROL); - fbc_ctl &= ~FBC_CTL_EN; - OUTREG(FBC_CONTROL, fbc_ctl); - - /* Wait for compressing bit to clear */ - while (INREG(FBC_STATUS) & FBC_STAT_COMPRESSING) - ; /* nothing */ - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc disabled on pipe %c\n", pipe); -} - static void i830_crtc_prepare (xf86CrtcPtr crtc) { @@ -1059,6 +1078,9 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, else dspcntr |= DISPPLANE_SEL_PIPE_B; + if (pI830->tiling) + dspcntr |= DISPLAY_PLANE_TILED; + pipeconf = INREG(pipeconf_reg); if (pipe == 0 && !IS_I965G(pI830)) { diff --git a/src/i830_driver.c b/src/i830_driver.c index b617bd4a..b439aa91 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -1192,6 +1192,9 @@ I830PreInit(ScrnInfoPtr pScrn, int flags) xf86DrvMsg(pScrn->scrnIndex, from, "IO registers at addr 0x%lX\n", (unsigned long)pI830->MMIOAddr); + /* check quirks */ + i830_fixup_devices(pScrn); + /* Allocate an xf86CrtcConfig */ xf86CrtcConfigInit (pScrn, &i830_xf86crtc_config_funcs); xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); @@ -2721,14 +2724,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) pI830->directRenderingEnabled = I830DRIFinishScreenInit(pScreen); } -#ifdef XvMCExtension - if (pI830->XvEnabled && (pI830->directRenderingEnabled) && - (IS_I915G(pI830) || IS_I915GM(pI830) || - IS_I945G(pI830) || IS_I945GM(pI830) || - IS_G33CLASS(pI830))) { - I915InitMC(pScreen); - } -#endif #endif /* Setup 3D engine, needed for rotation too */ diff --git a/src/i830_exa.c b/src/i830_exa.c index fed4067b..b0029d1d 100644 --- a/src/i830_exa.c +++ b/src/i830_exa.c @@ -54,7 +54,7 @@ do { \ #define I830FALLBACK(s, arg...) \ do { \ return FALSE; \ -} while(0) +} while(0) #endif const int I830CopyROP[16] = @@ -97,6 +97,21 @@ const int I830PatternROP[16] = ROP_1 }; +static Bool +exaPixmapTiled(PixmapPtr p) +{ + ScreenPtr pScreen = p->drawable.pScreen; + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + I830Ptr pI830 = I830PTR(pScrn); + + if (!pI830->tiling) + return FALSE; + + if (p == pScreen->GetScreenPixmap(pScreen)) + return TRUE; + return FALSE; +} + /** * I830EXASync - wait for a command to finish * @pScreen: current screen @@ -133,12 +148,12 @@ I830EXAPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg) offset = exaGetPixmapOffset(pPixmap); pitch = exaGetPixmapPitch(pPixmap); - if ( offset % pI830->EXADriverPtr->pixmapOffsetAlign != 0) + if (offset % pI830->EXADriverPtr->pixmapOffsetAlign != 0) I830FALLBACK("pixmap offset not aligned"); - if ( pitch % pI830->EXADriverPtr->pixmapPitchAlign != 0) + if (pitch % pI830->EXADriverPtr->pixmapPitchAlign != 0) I830FALLBACK("pixmap pitch not aligned"); - pI830->BR[13] = (pitch & 0xffff); + pI830->BR[13] = (I830PatternROP[alu] & 0xff) << 16 ; switch (pPixmap->drawable.bitsPerPixel) { case 8: break; @@ -151,7 +166,6 @@ I830EXAPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg) pI830->BR[13] |= ((1 << 24) | (1 << 25)); break; } - pI830->BR[13] |= (I830PatternROP[alu] & 0xff) << 16 ; pI830->BR[16] = fg; return TRUE; } @@ -161,19 +175,29 @@ I830EXASolid(PixmapPtr pPixmap, int x1, int y1, int x2, int y2) { ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum]; I830Ptr pI830 = I830PTR(pScrn); - unsigned long offset; + unsigned long offset, pitch; + uint32_t cmd; + + offset = exaGetPixmapOffset(pPixmap); + pitch = exaGetPixmapPitch(pPixmap); - offset = exaGetPixmapOffset(pPixmap); - { BEGIN_LP_RING(6); + + cmd = XY_COLOR_BLT_CMD; + if (pPixmap->drawable.bitsPerPixel == 32) - OUT_RING(XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA - | XY_COLOR_BLT_WRITE_RGB); - else - OUT_RING(XY_COLOR_BLT_CMD); + cmd |= XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB; - OUT_RING(pI830->BR[13]); + if (IS_I965G(pI830) && exaPixmapTiled(pPixmap)) { + assert((pitch % 512) == 0); + pitch >>= 2; + cmd |= XY_COLOR_BLT_TILED; + } + + OUT_RING(cmd); + + OUT_RING(pI830->BR[13] | pitch); OUT_RING((y1 << 16) | (x1 & 0xffff)); OUT_RING((y2 << 16) | (x2 & 0xffff)); OUT_RING(offset); @@ -206,11 +230,9 @@ I830EXAPrepareCopy(PixmapPtr pSrcPixmap, PixmapPtr pDstPixmap, int xdir, if (!EXA_PM_IS_SOLID(&pSrcPixmap->drawable, planemask)) I830FALLBACK("planemask is not solid"); - pI830->copy_src_pitch = exaGetPixmapPitch(pSrcPixmap); - pI830->copy_src_off = exaGetPixmapOffset(pSrcPixmap); + pI830->pSrcPixmap = pSrcPixmap; - pI830->BR[13] = exaGetPixmapPitch(pDstPixmap); - pI830->BR[13] |= I830CopyROP[alu] << 16; + pI830->BR[13] = I830CopyROP[alu] << 16; switch (pSrcPixmap->drawable.bitsPerPixel) { case 8: @@ -231,30 +253,49 @@ I830EXACopy(PixmapPtr pDstPixmap, int src_x1, int src_y1, int dst_x1, { ScrnInfoPtr pScrn = xf86Screens[pDstPixmap->drawable.pScreen->myNum]; I830Ptr pI830 = I830PTR(pScrn); + uint32_t cmd; int dst_x2, dst_y2; - unsigned int dst_off; + unsigned int dst_off, dst_pitch, src_off, src_pitch; dst_x2 = dst_x1 + w; dst_y2 = dst_y1 + h; dst_off = exaGetPixmapOffset(pDstPixmap); + dst_pitch = exaGetPixmapPitch(pDstPixmap); + src_off = exaGetPixmapOffset(pI830->pSrcPixmap); + src_pitch = exaGetPixmapPitch(pI830->pSrcPixmap); { BEGIN_LP_RING(8); + cmd = XY_SRC_COPY_BLT_CMD; + if (pDstPixmap->drawable.bitsPerPixel == 32) - OUT_RING(XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); - else - OUT_RING(XY_SRC_COPY_BLT_CMD); + cmd |= XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB; + + if (IS_I965G(pI830)) { + if (exaPixmapTiled(pDstPixmap)) { + assert((dst_pitch % 512) == 0); + dst_pitch >>= 2; + cmd |= XY_SRC_COPY_BLT_DST_TILED; + } + + if (exaPixmapTiled(pI830->pSrcPixmap)) { + assert((src_pitch % 512) == 0); + src_pitch >>= 2; + cmd |= XY_SRC_COPY_BLT_SRC_TILED; + } + } + + OUT_RING(cmd); - OUT_RING(pI830->BR[13]); + OUT_RING(pI830->BR[13] | dst_pitch); OUT_RING((dst_y1 << 16) | (dst_x1 & 0xffff)); OUT_RING((dst_y2 << 16) | (dst_x2 & 0xffff)); OUT_RING(dst_off); OUT_RING((src_y1 << 16) | (src_x1 & 0xffff)); - OUT_RING(pI830->copy_src_pitch); - OUT_RING(pI830->copy_src_off); + OUT_RING(src_pitch); + OUT_RING(src_off); ADVANCE_LP_RING(); } @@ -410,11 +451,12 @@ I830EXAInit(ScreenPtr pScreen) pI830->exa_offscreen->size; pI830->EXADriverPtr->flags = EXA_OFFSCREEN_PIXMAPS; - DPRINTF(PFX, "EXA Mem: memoryBase 0x%x, end 0x%x, offscreen base 0x%x, memorySize 0x%x\n", - pI830->EXADriverPtr->memoryBase, - pI830->EXADriverPtr->memoryBase + pI830->EXADriverPtr->memorySize, - pI830->EXADriverPtr->offScreenBase, - pI830->EXADriverPtr->memorySize); + DPRINTF(PFX, "EXA Mem: memoryBase 0x%x, end 0x%x, offscreen base 0x%x, " + "memorySize 0x%x\n", + pI830->EXADriverPtr->memoryBase, + pI830->EXADriverPtr->memoryBase + pI830->EXADriverPtr->memorySize, + pI830->EXADriverPtr->offScreenBase, + pI830->EXADriverPtr->memorySize); /* Limits are described in the BLT engine chapter under Graphics Data Size diff --git a/src/i830_lvds.c b/src/i830_lvds.c index e2c6e3ce..18e5c2b3 100644 --- a/src/i830_lvds.c +++ b/src/i830_lvds.c @@ -46,6 +46,30 @@ struct i830_lvds_priv { int backlight_duty_cycle; }; +/** + * Use legacy backlight controls? + * + * \param pI830 device in question + * + * Returns TRUE if legacy backlight should be used, false otherwise. + */ +static int +i830_lvds_backlight_legacy(I830Ptr pI830) +{ + CARD32 blc_pwm_ctl, blc_pwm_ctl2; + + /* 965GM+ change the location of the legacy control bit */ + if (IS_I965GM(pI830)) { + blc_pwm_ctl2 = INREG(BLC_PWM_CTL2); + if (blc_pwm_ctl2 & BLM_LEGACY_MODE2) + return TRUE; + } else { + blc_pwm_ctl = INREG(BLC_PWM_CTL); + if (blc_pwm_ctl & BLM_LEGACY_MODE) + return TRUE; + } + return FALSE; +} /** * Sets the backlight level. @@ -59,18 +83,12 @@ i830_lvds_set_backlight(xf86OutputPtr output, int level) I830Ptr pI830 = I830PTR(pScrn); CARD32 blc_pwm_ctl; + if (i830_lvds_backlight_legacy(pI830)) + pciWriteByte(pI830->PciTag, LEGACY_BACKLIGHT_BRIGHTNESS, 0xfe); + blc_pwm_ctl = INREG(BLC_PWM_CTL); - if (blc_pwm_ctl & BLM_LEGACY_MODE) - { - pciWriteByte (pI830->PciTag, - LEGACY_BACKLIGHT_BRIGHTNESS, - level & 0xff); - } - else - { - blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK; - OUTREG(BLC_PWM_CTL, blc_pwm_ctl | (level << BACKLIGHT_DUTY_CYCLE_SHIFT)); - } + blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK; + OUTREG(BLC_PWM_CTL, blc_pwm_ctl | (level << BACKLIGHT_DUTY_CYCLE_SHIFT)); } /** @@ -82,12 +100,24 @@ i830_lvds_get_max_backlight(xf86OutputPtr output) ScrnInfoPtr pScrn = output->scrn; I830Ptr pI830 = I830PTR(pScrn); CARD32 pwm_ctl = INREG(BLC_PWM_CTL); + CARD32 val; + + if (IS_I965GM(pI830)) { + val = ((pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK2) >> + BACKLIGHT_MODULATION_FREQ_SHIFT2); + } else { + val = ((pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >> + BACKLIGHT_MODULATION_FREQ_SHIFT) * 2; + } - if (pwm_ctl & BLM_LEGACY_MODE) - return 0xff; - else - return ((pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >> - BACKLIGHT_MODULATION_FREQ_SHIFT) * 2; + /* + * In legacy control mode, backlight value is calculated: + * if (LBB[7:0] != 0xff) + * backlight = BLC_PWM_CTL[15:0] * BPC[7:0] + * else + * backlight = BLC_PWM_CTL[15:0] + */ + return val; } /** @@ -138,21 +168,15 @@ i830_lvds_save (xf86OutputPtr output) ScrnInfoPtr pScrn = output->scrn; I830Ptr pI830 = I830PTR(pScrn); + if (IS_I965GM(pI830)) + pI830->saveBLC_PWM_CTL2 = INREG(BLC_PWM_CTL2); pI830->savePP_ON = INREG(LVDSPP_ON); pI830->savePP_OFF = INREG(LVDSPP_OFF); pI830->savePP_CONTROL = INREG(PP_CONTROL); pI830->savePP_CYCLE = INREG(PP_CYCLE); pI830->saveBLC_PWM_CTL = INREG(BLC_PWM_CTL); - if (pI830->saveBLC_PWM_CTL & BLM_LEGACY_MODE) - { - dev_priv->backlight_duty_cycle = pciReadByte (pI830->PciTag, - LEGACY_BACKLIGHT_BRIGHTNESS); - } - else - { - dev_priv->backlight_duty_cycle = (pI830->saveBLC_PWM_CTL & - BACKLIGHT_DUTY_CYCLE_MASK); - } + dev_priv->backlight_duty_cycle = (pI830->saveBLC_PWM_CTL & + BACKLIGHT_DUTY_CYCLE_MASK); /* * If the light is off at server startup, just make it full brightness @@ -167,6 +191,8 @@ i830_lvds_restore(xf86OutputPtr output) ScrnInfoPtr pScrn = output->scrn; I830Ptr pI830 = I830PTR(pScrn); + if (IS_I965GM(pI830)) + OUTREG(BLC_PWM_CTL2, pI830->saveBLC_PWM_CTL2); OUTREG(BLC_PWM_CTL, pI830->saveBLC_PWM_CTL); OUTREG(LVDSPP_ON, pI830->savePP_ON); OUTREG(LVDSPP_OFF, pI830->savePP_OFF); @@ -462,6 +488,9 @@ i830_lvds_init(ScrnInfoPtr pScrn) DisplayModePtr modes, scan, bios_mode; struct i830_lvds_priv *dev_priv; + if (pI830->quirk_flag & QUIRK_IGNORE_LVDS) + return; + output = xf86OutputCreate (pScrn, &i830_lvds_output_funcs, "LVDS"); if (!output) return; @@ -575,29 +604,23 @@ i830_lvds_init(ScrnInfoPtr pScrn) /* Blacklist machines with BIOSes that list an LVDS panel without actually * having one. */ - if (pI830->PciInfo->chipType == PCI_CHIP_I945_GM) { - if (pI830->PciInfo->subsysVendor == 0xa0a0) /* aopen mini pc */ - goto disable_exit; - - if ((pI830->PciInfo->subsysVendor == 0x8086) && - (pI830->PciInfo->subsysCard == 0x7270)) { - /* It's a Mac Mini or Macbook Pro. - * - * Apple hardware is out to get us. The macbook pro has a real - * LVDS panel, but the mac mini does not, and they have the same - * device IDs. We'll distinguish by panel size, on the assumption - * that Apple isn't about to make any machines with an 800x600 - * display. - */ - - if (dev_priv->panel_fixed_mode != NULL && + if (pI830->quirk_flag & QUIRK_IGNORE_MACMINI_LVDS) { + /* It's a Mac Mini or Macbook Pro. + * + * Apple hardware is out to get us. The macbook pro has a real + * LVDS panel, but the mac mini does not, and they have the same + * device IDs. We'll distinguish by panel size, on the assumption + * that Apple isn't about to make any machines with an 800x600 + * display. + */ + + if (dev_priv->panel_fixed_mode != NULL && dev_priv->panel_fixed_mode->HDisplay == 800 && dev_priv->panel_fixed_mode->VDisplay == 600) - { - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Suspected Mac Mini, ignoring the LVDS\n"); - goto disable_exit; - } + { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Suspected Mac Mini, ignoring the LVDS\n"); + goto disable_exit; } } diff --git a/src/i830_memory.c b/src/i830_memory.c index b2c51492..c094d5d9 100644 --- a/src/i830_memory.c +++ b/src/i830_memory.c @@ -1453,11 +1453,6 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr, unsigned int offset, assert(tile_format != TILING_NONE); if (IS_I965G(pI830)) { - if (tile_format == TILING_XMAJOR) - pitch = 512; - else - pitch = 128; - if (nr < 0 || nr >= FENCE_NEW_NR) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "i830_set_fence(): fence %d out of range\n",nr); diff --git a/src/i830_quirks.c b/src/i830_quirks.c new file mode 100644 index 00000000..b75baefd --- /dev/null +++ b/src/i830_quirks.c @@ -0,0 +1,84 @@ +/* + * Copyright © 2007 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Zhenyu Wang <zhenyu.z.wang@intel.com> + * + */ +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "i830.h" + +#define SUBSYS_ANY (~0) + +typedef struct { + int chipType; + int subsysVendor; + int subsysCard; + void (*hook)(I830Ptr); +} i830_quirk, *i830_quirk_ptr; + +static void quirk_ignore_tv (I830Ptr pI830) +{ + pI830->quirk_flag |= QUIRK_IGNORE_TV; +} + +static void quirk_ignore_lvds (I830Ptr pI830) +{ + pI830->quirk_flag |= QUIRK_IGNORE_LVDS; +} + +static void quirk_mac_mini (I830Ptr pI830) +{ + pI830->quirk_flag |= QUIRK_IGNORE_MACMINI_LVDS; +} + +static i830_quirk i830_quirk_list[] = { + /* Lenovo T61 has no TV output */ + { PCI_CHIP_I965_GM, 0x17aa, 0x20b5, quirk_ignore_tv }, + /* Panasonic Toughbook CF-Y4 has no TV output */ + { PCI_CHIP_I915_GM, 0x10f7, 0x8338, quirk_ignore_tv }, + /* Lenovo 3000 v200 */ + { PCI_CHIP_I965_GM, 0x17aa, 0x3c18, quirk_ignore_tv }, + /* Aopen mini pc */ + { PCI_CHIP_I945_GM, 0xa0a0, SUBSYS_ANY, quirk_ignore_lvds }, + /* Mac mini has no lvds, but macbook pro does */ + { PCI_CHIP_I945_GM, 0x8086, 0x7270, quirk_mac_mini }, + { 0, 0, 0, NULL }, +}; + +void i830_fixup_devices(ScrnInfoPtr scrn) +{ + I830Ptr pI830 = I830PTR(scrn); + i830_quirk_ptr p = i830_quirk_list; + + while (p && p->chipType != 0) { + if (pI830->PciInfo->chipType == p->chipType && + pI830->PciInfo->subsysVendor == p->subsysVendor && + (pI830->PciInfo->subsysCard == p->subsysCard || + p->subsysCard == SUBSYS_ANY)) + p->hook(pI830); + ++p; + } +} diff --git a/src/i830_reg.h b/src/i830_reg.h index 8a2a98ac..df22ed41 100644 --- a/src/i830_reg.h +++ b/src/i830_reg.h @@ -36,6 +36,7 @@ #define FBC_CTL_EN (1<<31) #define FBC_CTL_PERIODIC (1<<30) #define FBC_CTL_INTERVAL_SHIFT (16) +#define FBC_CTL_UNCOMPRESSIBLE (1<<14) #define FBC_CTL_STRIDE_SHIFT (5) #define FBC_CTL_FENCENO (1<<0) #define FBC_COMMAND 0x0320c @@ -46,9 +47,15 @@ #define FBC_STAT_MODIFIED (1<<29) #define FBC_STAT_CURRENT_LINE (1<<0) #define FBC_CONTROL2 0x03214 +#define FBC_CTL_FENCE_DBL (0<<4) +#define FBC_CTL_IDLE_IMM (0<<2) +#define FBC_CTL_IDLE_FULL (1<<2) +#define FBC_CTL_IDLE_LINE (2<<2) +#define FBC_CTL_IDLE_DEBUG (3<<2) #define FBC_CTL_CPU_FENCE (1<<1) #define FBC_CTL_PLANEA (0<<0) #define FBC_CTL_PLANEB (1<<0) +#define FBC_FENCE_OFF 0x0321b #define FBC_LL_SIZE (1536) #define FBC_LL_PAD (32) diff --git a/src/i830_tv.c b/src/i830_tv.c index 8337d864..aba0e3be 100644 --- a/src/i830_tv.c +++ b/src/i830_tv.c @@ -1625,6 +1625,9 @@ i830_tv_init(ScrnInfoPtr pScrn) struct i830_tv_priv *dev_priv; CARD32 tv_dac_on, tv_dac_off, save_tv_dac; + if (pI830->quirk_flag & QUIRK_IGNORE_TV) + return; + if ((INREG(TV_CTL) & TV_FUSE_STATE_MASK) == TV_FUSE_STATE_DISABLED) return; diff --git a/src/i830_video.c b/src/i830_video.c index 4ee9f761..ed681048 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -560,6 +560,7 @@ I830InitVideo(ScreenPtr pScreen) XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL; XF86VideoAdaptorPtr overlayAdaptor = NULL, texturedAdaptor = NULL; int num_adaptors; + Bool xvmc_init = FALSE; #if 0 { @@ -602,16 +603,6 @@ I830InitVideo(ScreenPtr pScreen) if (texturedAdaptor != NULL) { adaptors[num_adaptors++] = texturedAdaptor; xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Set up textured video\n"); - -#ifdef XF86DRI -#ifdef XvMCExtension - if (IS_I915G(pI830) || IS_I915GM(pI830) || - IS_I945G(pI830) || IS_I945GM(pI830) || - IS_G33CLASS(pI830)) { - I915XvMCInitXv(pScrn, texturedAdaptor); - } -#endif -#endif } else { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Failed to set up textured video\n"); @@ -633,10 +624,18 @@ I830InitVideo(ScreenPtr pScreen) I830InitOffscreenImages(pScreen); } +#ifdef XvMCExtension + if (texturedAdaptor) + xvmc_init = I915XvMCInit(pScreen, texturedAdaptor); +#endif if (num_adaptors) xf86XVScreenInit(pScreen, adaptors, num_adaptors); xfree(adaptors); +#ifdef XvMCExtension + if (xvmc_init) + I915XvMCScreenInit(pScreen); +#endif } static void @@ -2631,11 +2630,7 @@ I830QueryImageAttributes(ScrnInfoPtr pScrn, break; case FOURCC_XVMC: *h = (*h + 1) & ~1; -#ifdef XF86DRI size = I915XvMCPutImageSize(pScrn); -#else - size = 0; -#endif if (pitches) pitches[0] = size; break; diff --git a/src/i830_video.h b/src/i830_video.h index 67022f6a..7e2d1498 100644 --- a/src/i830_video.h +++ b/src/i830_video.h @@ -77,7 +77,6 @@ typedef struct { int oneLineMode; int scaleRatio; Bool textured; - void *xvmc_priv; } I830PortPrivRec, *I830PortPrivPtr; #define GET_PORT_PRIVATE(pScrn) \ diff --git a/src/i830_xaa.c b/src/i830_xaa.c index ec8a8794..aa06a80c 100644 --- a/src/i830_xaa.c +++ b/src/i830_xaa.c @@ -126,7 +126,6 @@ I830XAAInit(ScreenPtr pScreen) if (!infoPtr) return FALSE; - pI830->bufferOffset = 0; infoPtr->Flags = LINEAR_FRAMEBUFFER | OFFSCREEN_PIXMAPS | PIXMAP_CACHE; /* Use the same sync function as the I830. @@ -235,6 +234,7 @@ I830XAAInit(ScreenPtr pScreen) infoPtr->RestoreAccelState = I830RestoreAccelState; } + /* Set up pI830->bufferOffset */ I830SelectBuffer(pScrn, I830_SELECT_FRONT); if (!XAAInit(pScreen, infoPtr)) diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c index 158b7b8e..7a8a0730 100644 --- a/src/i915_hwmc.c +++ b/src/i915_hwmc.c @@ -57,31 +57,6 @@ #include "i915_hwmc.h" -#define MAKE_ATOM(a) MakeAtom(a, strlen(a), TRUE) - -/* - * List Attributes for the XvMC extension to handle: - * As long as the attribute is supported by the Xv adaptor, it needs only to - * be added here to be supported also by XvMC. - */ -static char *attrXvMC[I915_NUM_XVMC_ATTRIBUTES] = { - "XV_BRIGHTNESS", - "XV_CONTRAST", -}; -static Atom attrAtoms[I915_NUM_XVMC_ATTRIBUTES]; - -typedef struct -{ - unsigned ctxDisplaying; - int xvmc_port; - I915XvMCAttrHolder xvAttr; - int newAttribute; - - SetPortAttributeFuncPtr SetPortAttribute; - GetPortAttributeFuncPtr GetPortAttribute; - PutImageFuncPtr PutImage; -} I915XvMCXVPriv; - #define I915_XVMC_MAX_BUFFERS 2 #define I915_XVMC_MAX_CONTEXTS 4 #define I915_XVMC_MAX_SURFACES 20 @@ -118,6 +93,7 @@ typedef struct _I915XvMC I915XvMCSurfacePriv *sfprivs[I915_XVMC_MAX_SURFACES]; I915XvMCContextPriv *ctxprivs[I915_XVMC_MAX_CONTEXTS]; int ncontexts,nsurfaces; + PutImageFuncPtr savePutImage; } I915XvMC, *I915XvMCPtr; #define ARRARY_SIZE(a) (sizeof(a) / sizeof(a[0])) @@ -155,8 +131,10 @@ static XF86MCSurfaceInfoRec i915_YV12_mpg2_surface = 720, 576, XVMC_MPEG_2, - XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING, - &yv12_subpicture_list + /* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING,*/ + 0, + /* &yv12_subpicture_list*/ + NULL, }; static XF86MCSurfaceInfoRec i915_YV12_mpg1_surface = @@ -169,8 +147,10 @@ static XF86MCSurfaceInfoRec i915_YV12_mpg1_surface = 720, 576, XVMC_MPEG_1, - XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING, - &yv12_subpicture_list + /* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING,*/ + 0, + /* &yv12_subpicture_list*/ + NULL, }; static XF86MCSurfaceInfoPtr ppSI[2] = @@ -201,8 +181,12 @@ static XF86MCAdaptorRec pAdapt = "Intel(R) Textured Video", /* name */ ARRARY_SIZE(ppSI), /* num_surfaces */ ppSI, /* surfaces */ + 0, + NULL, +#if 0 ARRARY_SIZE(i915_subpicture_list), /* num_subpictures */ i915_subpicture_list, /* subpictures */ +#endif (xf86XvMCCreateContextProcPtr)I915XvMCCreateContext, (xf86XvMCDestroyContextProcPtr)I915XvMCDestroyContext, (xf86XvMCCreateSurfaceProcPtr)I915XvMCCreateSurface, @@ -232,8 +216,11 @@ static void initI915XvMC(I915XvMCPtr xvmc) xvmc->surfaces[i] = 0; xvmc->sfprivs[i] = NULL; } + xvmc->ncontexts = 0; + xvmc->nsurfaces = 0; } +//XXX static void cleanupI915XvMC(I915XvMCPtr xvmc, XF86VideoAdaptorPtr * XvAdaptors, int XvAdaptorCount) { unsigned int i; @@ -480,22 +467,24 @@ static int I915XvMCCreateContext (ScrnInfoPtr pScrn, XvMCContextPtr pContext, I915XvMCCreateContextRec *contextRec = NULL; I915XvMCPtr pXvMC = pI830->xvmc; I915XvMCContextPriv *ctxpriv = NULL; - XvPortRecPrivatePtr portPriv = (XvPortRecPrivatePtr)pContext->port_priv; - I830PortPrivPtr pPriv = (I830PortPrivPtr)portPriv->DevPriv.ptr; - I915XvMCXVPriv *vx = (I915XvMCXVPriv *)pPriv->xvmc_priv; - int i; *priv = NULL; *num_priv = 0; - if (!pI830->directRenderingEnabled) { + if (!pI830->XvMCEnabled) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "[XvMC] I915XvMCCreateContext: Cannot use XvMC without DRI!\n"); + "[XvMC] I915XvMCCreateContext: Cannot use XvMC!\n"); return BadAlloc; } - if (pXvMC->ncontexts >= I915_XVMC_MAX_CONTEXTS) { + for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) { + if (!pXvMC->contexts[i]) + break; + } + + if (i == I915_XVMC_MAX_CONTEXTS || + pXvMC->ncontexts >= I915_XVMC_MAX_CONTEXTS) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] I915XvMCCreateContext: Out of contexts.\n"); return BadAlloc; @@ -511,11 +500,6 @@ static int I915XvMCCreateContext (ScrnInfoPtr pScrn, XvMCContextPtr pContext, *num_priv = sizeof(I915XvMCCreateContextRec) >> 2; - for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) { - if (!pXvMC->contexts[i]) - break; - } - ctxpriv = (I915XvMCContextPriv *)xcalloc(1, sizeof(I915XvMCContextPriv)); if (!ctxpriv) { @@ -580,7 +564,6 @@ static int I915XvMCCreateContext (ScrnInfoPtr pScrn, XvMCContextPtr pContext, contextRec->screen = pScrn->pScreen->myNum; contextRec->depth = pScrn->bitsPerPixel; contextRec->deviceID = pI830DRI->deviceID; - contextRec->initAttrs = vx->xvAttr; pXvMC->ncontexts++; pXvMC->contexts[i] = pContext->context_id; @@ -600,10 +583,22 @@ static int I915XvMCCreateSurface(ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf, unsigned int srfno; unsigned long bufsize; + if (!pI830->XvMCEnabled) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "[XvMC] I915XvMCCreateContext: Cannot use XvMC!\n"); + return BadAlloc; + } + *priv = NULL; *num_priv = 0; - if (pXvMC->nsurfaces >= I915_XVMC_MAX_SURFACES) { + for (srfno = 0; srfno < I915_XVMC_MAX_SURFACES; ++srfno) { + if (!pXvMC->surfaces[srfno]) + break; + } + + if (srfno == I915_XVMC_MAX_SURFACES || + pXvMC->nsurfaces >= I915_XVMC_MAX_SURFACES) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] I915XvMCCreateSurface: Too many surfaces !\n"); return BadAlloc; @@ -659,10 +654,6 @@ static int I915XvMCCreateSurface(ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf, return BadAlloc; } - for (srfno = 0; srfno < I915_XVMC_MAX_SURFACES; ++srfno) { - if (!pXvMC->surfaces[srfno]) - break; - } surfaceRec->srfno = srfno; surfaceRec->srf.handle = sfpriv->surface_handle; surfaceRec->srf.offset = sfpriv->surface->offset; @@ -683,13 +674,19 @@ static int I915XvMCCreateSubpicture (ScrnInfoPtr pScrn, XvMCSubpicturePtr pSubp, I915XvMCSurfacePriv *sfpriv = NULL; I915XvMCCreateSurfaceRec *surfaceRec = NULL; XvMCContextPtr ctx = NULL; - unsigned srfno; - unsigned bufsize; + unsigned int srfno; + unsigned int bufsize; *priv = NULL; *num_priv = 0; - if (pXvMC->nsurfaces >= I915_XVMC_MAX_SURFACES) { + for (srfno = 0; srfno < I915_XVMC_MAX_SURFACES; ++srfno) { + if (!pXvMC->surfaces[srfno]) + break; + } + + if (srfno == I915_XVMC_MAX_SURFACES || + pXvMC->nsurfaces >= I915_XVMC_MAX_SURFACES) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] I915XvMCCreateSubpicture: Too many surfaces !\n"); return BadAlloc; @@ -745,11 +742,6 @@ static int I915XvMCCreateSubpicture (ScrnInfoPtr pScrn, XvMCSubpicturePtr pSubp, return BadAlloc; } - for (srfno = 0; srfno < I915_XVMC_MAX_SURFACES; ++srfno) { - if (!pXvMC->surfaces[srfno]) - break; - } - surfaceRec->srfno = srfno; surfaceRec->srf.handle = sfpriv->surface_handle; surfaceRec->srf.offset = sfpriv->surface->offset; @@ -825,65 +817,7 @@ static void I915XvMCDestroySubpicture (ScrnInfoPtr pScrn, XvMCSubpicturePtr pSub return; } -/* - * - */ -static int I915XvMCInterceptXvGetAttribute(ScrnInfoPtr pScrn, Atom attribute, - INT32 * value, pointer data) -{ - unsigned i; - I830PortPrivPtr pPriv = (I830PortPrivPtr)data; - I915XvMCXVPriv *vx = (I915XvMCXVPriv *)pPriv->xvmc_priv; - - if (I830PTR(pScrn)->XvMCEnabled) { - for (i = 0; i < vx->xvAttr.numAttr; ++i) { - if (vx->xvAttr.attributes[i].attribute == attribute) { - *value = vx->xvAttr.attributes[i].value; - return Success; - } - } - } - - return vx->GetPortAttribute(pScrn, attribute, value, data); -} - -static int I915XvMCInterceptXvAttribute(ScrnInfoPtr pScrn, Atom attribute, - INT32 value, pointer data) -{ - unsigned i; - I830PortPrivPtr pPriv = (I830PortPrivPtr)data; - I915XvMCXVPriv *vx = (I915XvMCXVPriv *)pPriv->xvmc_priv; - - if (I830PTR(pScrn)->XvMCEnabled) { - for (i = 0; i < vx->xvAttr.numAttr; ++i) { - if (vx->xvAttr.attributes[i].attribute == attribute) { - vx->xvAttr.attributes[i].value = value; - return Success; - } - } - } - - return vx->SetPortAttribute(pScrn, attribute, value, data); -} - -static int I915XvMCDisplayAttributes(ScrnInfoPtr pScrn, - const I915XvMCAttrHolder * ah, I830PortPrivPtr pPriv) -{ - I915XvMCXVPriv *vx = (I915XvMCXVPriv *) pPriv->xvmc_priv; - unsigned i; - int ret; - - for (i = 0; i < ah->numAttr; ++i) { - ret = vx->SetPortAttribute(pScrn, ah->attributes[i].attribute, - ah->attributes[i].value, pPriv); - if (ret) - return ret; - } - - return Success; -} - -static int I915XvMCInterceptPutImage(ScrnInfoPtr pScrn, short src_x, short src_y, +static int I915XvMCPutImage(ScrnInfoPtr pScrn, short src_x, short src_y, short drw_x, short drw_y, short src_w, short src_h, short drw_w, short drw_h, int id, unsigned char *buf, short width, @@ -891,52 +825,33 @@ static int I915XvMCInterceptPutImage(ScrnInfoPtr pScrn, short src_x, short src_y DrawablePtr pDraw) { I830Ptr pI830 = I830PTR(pScrn); - I830PortPrivPtr pPriv = (I830PortPrivPtr)data; - I915XvMCXVPriv *vx = (I915XvMCXVPriv *)pPriv->xvmc_priv; + I915XvMCPtr pXvMC = pI830->xvmc; + I915XvMCCommandBuffer *i915XvMCData = (I915XvMCCommandBuffer *)buf; int ret; - if (I830PTR(pScrn)->XvMCEnabled) { + if (pI830->XvMCEnabled) { if (FOURCC_XVMC == id) { - I915XvMCPtr pXvMC = pI830->xvmc; - I915XvMCCommandBuffer *i915XvMCData = (I915XvMCCommandBuffer *)buf; - int i; - switch (i915XvMCData->command) { - case I915_XVMC_COMMAND_ATTRIBUTES: - if ((i915XvMCData->ctxNo | I915_XVMC_VALID) != vx->ctxDisplaying) - return 1; - - I915XvMCDisplayAttributes(pScrn, &i915XvMCData->attrib, pPriv); - return 0; - case I915_XVMC_COMMAND_DISPLAY: - for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) { - i830_memory *mem = NULL; - - if ((i915XvMCData->srfNo >= I915_XVMC_MAX_SURFACES) || - !pXvMC->surfaces[i915XvMCData->srfNo] || - !pXvMC->sfprivs[i915XvMCData->srfNo]) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "[XvMC] I915XvMCInterceptPutImage: Invalid parameters !\n"); - return 1; - } - - mem = pXvMC->sfprivs[i915XvMCData->srfNo]->surface; - buf = pI830->FbBase + mem->offset; - id = i915XvMCData->real_id; - pI830->IsXvMCSurface = 1; - break; - } - - break; - + if ((i915XvMCData->srfNo >= I915_XVMC_MAX_SURFACES) || + !pXvMC->surfaces[i915XvMCData->srfNo] || + !pXvMC->sfprivs[i915XvMCData->srfNo]) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "[XvMC] I915XvMCPutImage: Invalid parameters !\n"); + return 1; + } + + buf = pI830->FbBase + pXvMC->sfprivs[i915XvMCData->srfNo]->surface->offset; + id = i915XvMCData->real_id; + pI830->IsXvMCSurface = 1; + break; default: return 0; } } } - ret = vx->PutImage(pScrn, src_x, src_y, drw_x, drw_y, src_w, src_h, + ret = pXvMC->savePutImage(pScrn, src_x, src_y, drw_x, drw_y, src_w, src_h, drw_w, drw_h, id, buf, width, height, sync, clipBoxes, data, pDraw); pI830->IsXvMCSurface = 0; return ret; @@ -955,83 +870,56 @@ static int I915XvMCInterceptPutImage(ScrnInfoPtr pScrn, short src_x, short src_y * None * **************************************************************************/ -void I915InitMC(ScreenPtr pScreen) + +Bool I915XvMCInit(ScreenPtr pScreen, XF86VideoAdaptorPtr XvAdapt) { ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; I830Ptr pI830 = I830PTR(pScrn); - I915XvMCPtr pXvMC = NULL; + I915XvMCPtr pXvMC; - pI830->XvMCEnabled = FALSE; - if (!pI830->directRenderingEnabled) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "[XvMC] Cannot use XvMC without DRI!\n"); - return; - } + if (!IS_I9XX(pI830) || IS_I965G(pI830)) + return FALSE; - pXvMC = (I915XvMCPtr)calloc(1, sizeof(I915XvMC)); + pXvMC = (I915XvMCPtr)xcalloc(1, sizeof(I915XvMC)); if (!pXvMC) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "[XvMC] Failure!\n"); - return; + "[XvMC] alloc driver private failed!\n"); + return FALSE; } - pI830->xvmc = pXvMC; initI915XvMC(pXvMC); - xf86XvMCScreenInit(pScreen, 1, ppAdapt); - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "[XvMC] Initialized XvMC extension.\n"); - pI830->XvMCEnabled = TRUE; + + /* set up wrappers */ + pXvMC->savePutImage = XvAdapt->PutImage; + XvAdapt->PutImage = I915XvMCPutImage; + return TRUE; } -int I915XvMCInitXv(ScrnInfoPtr pScrn, XF86VideoAdaptorPtr XvAdapt) +Bool I915XvMCScreenInit(ScreenPtr pScreen) { - I830PortPrivPtr pPriv; - I915XvMCXVPriv *vx; - unsigned i, j; - SetPortAttributeFuncPtr setportattribute = XvAdapt->SetPortAttribute; - GetPortAttributeFuncPtr getportattribute = XvAdapt->GetPortAttribute; - PutImageFuncPtr putimage = XvAdapt->PutImage; - - XvAdapt->GetPortAttribute = I915XvMCInterceptXvGetAttribute; - XvAdapt->SetPortAttribute = I915XvMCInterceptXvAttribute; - XvAdapt->PutImage = I915XvMCInterceptPutImage; - - for (j = 0; j < XvAdapt->nPorts; ++j) { - pPriv = (I830PortPrivPtr) XvAdapt->pPortPrivates[j].ptr; - - if (NULL == (pPriv->xvmc_priv = xcalloc(1, sizeof(I915XvMCXVPriv)))) { - return BadAlloc; - } - - for (i = 0; i < I915_NUM_XVMC_ATTRIBUTES; ++i) { - attrAtoms[i] = MAKE_ATOM(attrXvMC[i]); - } - - vx = (I915XvMCXVPriv *) pPriv->xvmc_priv; - - vx->ctxDisplaying = 0; - vx->xvAttr.numAttr = I915_NUM_XVMC_ATTRIBUTES; - vx->xvmc_port = -1; - vx->newAttribute = 1; - - /* set up wrappers */ - vx->GetPortAttribute = getportattribute; - vx->SetPortAttribute = setportattribute; - vx->PutImage = putimage; + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + I830Ptr pI830 = I830PTR(pScrn); - for (i = 0; i < I915_NUM_XVMC_ATTRIBUTES; ++i) { - vx->xvAttr.attributes[i].attribute = attrAtoms[i]; - vx->xvAttr.attributes[i].value = 0; - vx->GetPortAttribute(pScrn, attrAtoms[i], - &(vx->xvAttr.attributes[i].value), pPriv); - } + if (xf86XvMCScreenInit(pScreen, 1, ppAdapt)) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "[XvMC] Initialized XvMC.\n"); + pI830->XvMCEnabled = TRUE; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "[XvMC] xf86 XvMC initial failed\n"); + pI830->XvMCEnabled = FALSE; + xfree(pI830->xvmc); + pI830->xvmc = NULL; + return FALSE; } - return Success; + return TRUE; } unsigned long I915XvMCPutImageSize(ScrnInfoPtr pScrn) { - if (I830PTR(pScrn)->XvMCEnabled) + I830Ptr pI830 = I830PTR(pScrn); + + if (pI830->XvMCEnabled) return sizeof(I915XvMCCommandBuffer); return 0; diff --git a/src/i915_hwmc.h b/src/i915_hwmc.h index 529636e3..597d30ce 100644 --- a/src/i915_hwmc.h +++ b/src/i915_hwmc.h @@ -44,29 +44,14 @@ #define I915_XVMC_COMMAND_DISPLAY 0x00 #define I915_XVMC_COMMAND_UNDISPLAY 0x01 -#define I915_XVMC_COMMAND_ATTRIBUTES 0x02 typedef struct { - INT32 attribute; - INT32 value; -} I915AttrPair; - -typedef struct -{ - unsigned numAttr; - I915AttrPair attributes[I915_NUM_XVMC_ATTRIBUTES]; -} I915XvMCAttrHolder; - -typedef struct -{ - unsigned command; - unsigned ctxNo; - unsigned srfNo; - unsigned subPicNo; - I915XvMCAttrHolder attrib; + unsigned int command; + unsigned int ctxNo; + unsigned int srfNo; + unsigned int subPicNo; int real_id; - unsigned pad; } I915XvMCCommandBuffer; struct hwmc_buffer @@ -79,7 +64,7 @@ struct hwmc_buffer typedef struct { - unsigned ctxno; /* XvMC private context reference number */ + unsigned int ctxno; /* XvMC private context reference number */ struct hwmc_buffer sis; struct hwmc_buffer ssb; struct hwmc_buffer msb; @@ -87,17 +72,16 @@ typedef struct struct hwmc_buffer psc; struct hwmc_buffer corrdata;/* Correction Data Buffer */ struct hwmc_buffer batchbuffer; - unsigned sarea_size; - unsigned sarea_priv_offset; - unsigned screen; - unsigned depth; + unsigned int sarea_size; + unsigned int sarea_priv_offset; + unsigned int screen; + unsigned int depth; int deviceID; - I915XvMCAttrHolder initAttrs; } I915XvMCCreateContextRec; typedef struct { - unsigned srfno; + unsigned int srfno; struct hwmc_buffer srf; } I915XvMCCreateSurfaceRec; diff --git a/src/i965_render.c b/src/i965_render.c index 744501ae..ec64ddd7 100644 --- a/src/i965_render.c +++ b/src/i965_render.c @@ -161,16 +161,9 @@ static Bool i965_get_dest_format(PicturePtr pDstPicture, CARD32 *dst_format) case PICT_x1r5g5b5: *dst_format = BRW_SURFACEFORMAT_B5G5R5X1_UNORM; break; - /* COLR_BUF_8BIT is special for YUV surfaces. While we may end up being - * able to use it depending on how the hardware implements it, disable it - * for now while we don't know what exactly it does (what channel does it - * read from? - */ - /* case PICT_a8: - *dst_format = COLR_BUF_8BIT; + *dst_format = BRW_SURFACEFORMAT_A8_UNORM; break; - */ case PICT_a4r4g4b4: case PICT_x4r4g4b4: *dst_format = BRW_SURFACEFORMAT_B4G4R4A4_UNORM; @@ -292,7 +285,7 @@ static int next_offset, total_state_size; static char *state_base; static int state_base_offset; static float *vb; -static int vb_size = (4 * 4) * 4 ; /* 4 DWORDS per vertex*/ +static int vb_size = (6 * 4) * 4 ; /* 6 DWORDS per vertex - and mask*/ static CARD32 src_blend, dst_blend; @@ -503,7 +496,7 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture, next_offset = mask_sampler_offset + sizeof(*mask_sampler_state); } /* Align VB to native size of elements, for safety */ - vb_offset = ALIGN(next_offset, 8); + vb_offset = ALIGN(next_offset, 32); next_offset = vb_offset + vb_size; /* And then the general state: */ @@ -800,7 +793,8 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture, * back to SF which then hands pixels off to WM. */ if (pMask) - memcpy(sf_kernel, sf_kernel_static_mask, sizeof (sf_kernel_static)); + memcpy(sf_kernel, sf_kernel_static_mask, + sizeof (sf_kernel_static_mask)); else if (rotation_program) memcpy(sf_kernel, sf_kernel_static_rotation, sizeof (sf_kernel_static_rotation)); diff --git a/src/xvmc/I915XvMC.c b/src/xvmc/I915XvMC.c index 3eb0bc38..22718deb 100644 --- a/src/xvmc/I915XvMC.c +++ b/src/xvmc/I915XvMC.c @@ -66,7 +66,7 @@ SIZE_Y420(surface->width, surface->height)) /* Lookup tables to speed common calculations */ -_STATIC_ unsigned mb_bytes[] = { +_STATIC_ unsigned int mb_bytes[] = { 000, 128, 128, 256, 128, 256, 256, 384, // 0 128, 256, 256, 384, 256, 384, 384, 512, // 1 128, 256, 256, 384, 256, 384, 384, 512, // 10 @@ -86,13 +86,13 @@ _STATIC_ char I915KernelDriverName[] = "i915"; _STATIC_ int error_base; _STATIC_ int event_base; -_STATIC_ int findOverlap(unsigned width, unsigned height, +_STATIC_ int findOverlap(unsigned int width, unsigned int height, short *dstX, short *dstY, short *srcX, short *srcY, unsigned short *areaW, unsigned short *areaH) { int w, h; - unsigned mWidth, mHeight; + unsigned int mWidth, mHeight; w = *areaW; h = *areaH; @@ -122,52 +122,13 @@ _STATIC_ int findOverlap(unsigned width, unsigned height, return 0; } -_STATIC_ void setupAttribDesc(Display * display, XvPortID port, - const I915XvMCAttrHolder * attrib, XvAttribute attribDesc[]) -{ - XvAttribute *XvAttribs, *curAD; - int num; - unsigned i, j; - - XLockDisplay(display); - XvAttribs = XvQueryPortAttributes(display, port, &num); - for (i = 0; i < attrib->numAttr; ++i) { - curAD = attribDesc + i; - curAD->flags = 0; - curAD->min_value = 0; - curAD->max_value = 0; - curAD->name = NULL; - for (j = 0; j < num; ++j) { - if (attrib->attributes[i].attribute == - XInternAtom(display, XvAttribs[j].name, TRUE)) { - *curAD = XvAttribs[j]; - curAD->name = strdup(XvAttribs[j].name); - break; - } - } - } - if (XvAttribs) - XFree(XvAttribs); - XUnlockDisplay(display); -} - -_STATIC_ void releaseAttribDesc(int numAttr, XvAttribute attribDesc[]) -{ - int i; - - for (i = 0; i < numAttr; ++i) { - if (attribDesc[i].name) - free(attribDesc[i].name); - } -} - _STATIC_ __inline__ void renderError(void) { printf("Invalid Macroblock Parameters found.\n"); return; } -_STATIC_ void I915XvMCContendedLock(i915XvMCContext *pI915XvMC, unsigned flags) +_STATIC_ void I915XvMCContendedLock(i915XvMCContext *pI915XvMC, drmLockFlags flags) { drmGetLock(pI915XvMC->fd, pI915XvMC->hHWContext, flags); } @@ -241,16 +202,16 @@ _STATIC_ void i915_flush(i915XvMCContext *pI915XvMC, int map, int render) /* for MC picture rendering */ _STATIC_ void i915_mc_static_indirect_state_buffer(XvMCContext *context, XvMCSurface *surface, - unsigned picture_structure, - unsigned flags, - unsigned picture_coding_type) + unsigned int picture_structure, + unsigned int flags, + unsigned int picture_coding_type) { struct i915_3dstate_buffer_info *buffer_info; struct i915_3dstate_dest_buffer_variables *dest_buffer_variables; struct i915_3dstate_dest_buffer_variables_mpeg *dest_buffer_variables_mpeg; i915XvMCSurface *pI915Surface = (i915XvMCSurface *)surface->privData; i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData; - unsigned w = surface->width, h = surface->height; + unsigned int w = surface->width, h = surface->height; /* 3DSTATE_BUFFER_INFO */ /* DEST Y */ @@ -373,7 +334,7 @@ _STATIC_ void i915_mc_map_state_buffer(XvMCContext *context, struct i915_3dstate_map_state *map_state; struct texture_map *tm; i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData; - unsigned w = context->width, h = context->height; + unsigned int w = context->width, h = context->height; /* 3DSATE_MAP_STATE: Y */ map_state = (struct i915_3dstate_map_state *)pI915XvMC->msb.map; @@ -518,7 +479,7 @@ _STATIC_ void i915_mc_load_sis_msb_buffers(XvMCContext *context) msb_state *msb = NULL; i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData; void *base = NULL; - unsigned size; + unsigned int size; int mem_select = 1; /* 3DSTATE_LOAD_INDIRECT */ @@ -663,7 +624,7 @@ _STATIC_ void i915_mc_mpeg_macroblock_1fbmv(XvMCContext *context, XvMCMacroBlock intelBatchbufferData(pI915XvMC, ¯oblock_1fbmv, sizeof(macroblock_1fbmv), 0); } -_STATIC_ void i915_mc_mpeg_macroblock_2fbmv(XvMCContext *context, XvMCMacroBlock *mb, unsigned ps) +_STATIC_ void i915_mc_mpeg_macroblock_2fbmv(XvMCContext *context, XvMCMacroBlock *mb, unsigned int ps) { struct i915_3dmpeg_macroblock_2fbmv macroblock_2fbmv; i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData; @@ -800,12 +761,12 @@ _STATIC_ void i915_mc_sampler_state_buffer(XvMCContext *context) ts->ts2.default_color = 0; } -_STATIC_ void i915_inst_arith(unsigned *inst, - unsigned op, - unsigned dest, - unsigned mask, - unsigned saturate, - unsigned src0, unsigned src1, unsigned src2) +_STATIC_ void i915_inst_arith(unsigned int *inst, + unsigned int op, + unsigned int dest, + unsigned int mask, + unsigned int saturate, + unsigned int src0, unsigned int src1, unsigned int src2) { dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)); *inst = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0)); @@ -815,12 +776,12 @@ _STATIC_ void i915_inst_arith(unsigned *inst, *inst = (A2_SRC1(src1) | A2_SRC2(src2)); } -_STATIC_ void i915_inst_decl(unsigned *inst, - unsigned type, - unsigned nr, - unsigned d0_flags) +_STATIC_ void i915_inst_decl(unsigned int *inst, + unsigned int type, + unsigned int nr, + unsigned int d0_flags) { - unsigned reg = UREG(type, nr); + unsigned int reg = UREG(type, nr); *inst = (D0_DCL | D0_DEST(reg) | d0_flags); inst++; @@ -829,11 +790,11 @@ _STATIC_ void i915_inst_decl(unsigned *inst, *inst = D2_MBZ; } -_STATIC_ void i915_inst_texld(unsigned *inst, - unsigned op, - unsigned dest, - unsigned coord, - unsigned sampler) +_STATIC_ void i915_inst_texld(unsigned int *inst, + unsigned int op, + unsigned int dest, + unsigned int coord, + unsigned int sampler) { dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)); *inst = (op | T0_DEST(dest) | T0_SAMPLER(sampler)); @@ -847,8 +808,8 @@ _STATIC_ void i915_mc_pixel_shader_program_buffer(XvMCContext *context) { struct i915_3dstate_pixel_shader_program *pixel_shader_program; i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData; - unsigned *inst; - unsigned dest, src0, src1, src2; + unsigned int *inst; + unsigned int dest, src0, src1, src2; /* Shader 0 */ pixel_shader_program = (struct i915_3dstate_pixel_shader_program *)pI915XvMC->psp.map; @@ -858,7 +819,7 @@ _STATIC_ void i915_mc_pixel_shader_program_buffer(XvMCContext *context) pixel_shader_program->dw0.retain = 1; pixel_shader_program->dw0.length = 2; /* mov oC, c0.0000 */ - inst = (unsigned *)(++pixel_shader_program); + inst = (unsigned int*)(++pixel_shader_program); dest = UREG(REG_TYPE_OC, 0); src0 = UREG(REG_TYPE_CONST, 0); src1 = 0; @@ -875,7 +836,7 @@ _STATIC_ void i915_mc_pixel_shader_program_buffer(XvMCContext *context) pixel_shader_program->dw0.retain = 1; pixel_shader_program->dw0.length = 14; /* dcl t0.xy */ - inst = (unsigned *)(++pixel_shader_program); + inst = (unsigned int*)(++pixel_shader_program); i915_inst_decl(inst, REG_TYPE_T, T_TEX0, D0_CHANNEL_XY); /* dcl t1.xy */ inst += 3; @@ -906,7 +867,7 @@ _STATIC_ void i915_mc_pixel_shader_program_buffer(XvMCContext *context) pixel_shader_program->dw0.retain = 1; pixel_shader_program->dw0.length = 14; /* dcl t2.xy */ - inst = (unsigned *)(++pixel_shader_program); + inst = (unsigned int*)(++pixel_shader_program); i915_inst_decl(inst, REG_TYPE_T, T_TEX2, D0_CHANNEL_XY); /* dcl t3.xy */ inst += 3; @@ -937,7 +898,7 @@ _STATIC_ void i915_mc_pixel_shader_program_buffer(XvMCContext *context) pixel_shader_program->dw0.retain = 1; pixel_shader_program->dw0.length = 29; /* dcl t0.xy */ - inst = (unsigned *)(++pixel_shader_program); + inst = (unsigned int*)(++pixel_shader_program); i915_inst_decl(inst, REG_TYPE_T, T_TEX0, D0_CHANNEL_XY); /* dcl t1.xy */ inst += 3; @@ -1015,7 +976,7 @@ _STATIC_ void i915_mc_one_time_state_initialization(XvMCContext *context) psp_state *psp = NULL; psc_state *psc = NULL; i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData; - unsigned size; + unsigned int size; void *base = NULL; int mem_select = 1; @@ -1116,7 +1077,7 @@ _STATIC_ void i915_mc_one_time_state_initialization(XvMCContext *context) free(base); } -_STATIC_ void i915_mc_invalidate_subcontext_buffers(XvMCContext *context, unsigned mask) +_STATIC_ void i915_mc_invalidate_subcontext_buffers(XvMCContext *context, unsigned int mask) { struct i915_3dstate_load_indirect *load_indirect = NULL; sis_state *sis = NULL; @@ -1126,7 +1087,7 @@ _STATIC_ void i915_mc_invalidate_subcontext_buffers(XvMCContext *context, unsign psp_state *psp = NULL; psc_state *psc = NULL; i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData; - unsigned size; + unsigned int size; void *base = NULL, *ptr = NULL; size = sizeof(*load_indirect); @@ -1325,7 +1286,7 @@ _STATIC_ void i915_yuv2rgb_map_state_buffer(XvMCSurface *target_surface) struct texture_map *tm; i915XvMCSurface *privTarget = NULL; i915XvMCContext *pI915XvMC = NULL; - unsigned w = target_surface->width, h = target_surface->height; + unsigned int w = target_surface->width, h = target_surface->height; privTarget = (i915XvMCSurface *)target_surface->privData; pI915XvMC = (i915XvMCContext *)privTarget->privContext; @@ -1491,7 +1452,7 @@ _STATIC_ void i915_yuv2rgb_sampler_state_buffer(XvMCSurface *surface) } _STATIC_ void i915_yuv2rgb_static_indirect_state_buffer(XvMCSurface *surface, - unsigned dstaddr, + unsigned int dstaddr, int dstpitch) { struct i915_3dstate_buffer_info *buffer_info; @@ -1529,8 +1490,8 @@ _STATIC_ void i915_yuv2rgb_pixel_shader_program_buffer(XvMCSurface *surface) struct i915_3dstate_pixel_shader_program *pixel_shader_program; i915XvMCSurface *privSurface = (i915XvMCSurface *)surface->privData; i915XvMCContext *pI915XvMC = (i915XvMCContext *)privSurface->privContext; - unsigned *inst; - unsigned dest, src0, src1; + unsigned int *inst; + unsigned int dest, src0, src1; /* Shader 0 */ pixel_shader_program = (struct i915_3dstate_pixel_shader_program *)pI915XvMC->psp.map; @@ -1540,7 +1501,7 @@ _STATIC_ void i915_yuv2rgb_pixel_shader_program_buffer(XvMCSurface *surface) pixel_shader_program->dw0.retain = 0; pixel_shader_program->dw0.length = 23; /* dcl t0.xy */ - inst = (unsigned *)(++pixel_shader_program); + inst = (unsigned int*)(++pixel_shader_program); i915_inst_decl(inst, REG_TYPE_T, T_TEX0, D0_CHANNEL_XY); /* dcl t1.xy */ inst += 3; @@ -1593,7 +1554,7 @@ _STATIC_ void i915_yuv2rgb_proc(XvMCSurface *surface) psp_state *psp = NULL; struct i915_3dprimitive *_3dprimitive = NULL; struct vertex_data *vd = NULL; - unsigned size; + unsigned int size; void *base = NULL; /* 3DSTATE_LOAD_STATE_IMMEDIATE_1 */ @@ -1747,7 +1708,6 @@ _STATIC_ void i915_release_resource(Display *display, XvMCContext *context) pI915XvMC->ref--; i915_xvmc_unmap_buffers(pI915XvMC); - releaseAttribDesc(pI915XvMC->attrib.numAttr, pI915XvMC->attribDesc); driDestroyHashContents(pI915XvMC->drawHash); drmHashDestroy(pI915XvMC->drawHash); @@ -1934,7 +1894,6 @@ Status XvMCCreateContext(Display *display, XvPortID port, pI915XvMC->sarea_priv_offset = tmpComm->sarea_priv_offset; pI915XvMC->screen = tmpComm->screen; pI915XvMC->depth = tmpComm->depth; - pI915XvMC->attrib = tmpComm->initAttrs; /* Must free the private data we were passed from X */ free(priv_data); @@ -2047,11 +2006,9 @@ Status XvMCCreateContext(Display *display, XvPortID port, } /* Initialize private context values */ - setupAttribDesc(display, port, &pI915XvMC->attrib, pI915XvMC->attribDesc); pI915XvMC->yStride = STRIDE(width); pI915XvMC->uvStride = STRIDE(width >> 1); pI915XvMC->haveXv = 0; - pI915XvMC->attribChanged = 1; pI915XvMC->dual_prime = 0; pI915XvMC->last_flip = 0; pI915XvMC->locked = 0; @@ -2582,7 +2539,6 @@ Status XvMCPutSurface(Display *display,XvMCSurface *surface, buf.srfNo = pI915Surface->srfNo; pI915SubPic = pI915Surface->privSubPic; buf.subPicNo = (!pI915SubPic ? 0 : pI915SubPic->srfNo); - buf.attrib = pI915XvMC->attrib; buf.real_id = FOURCC_YV12; XLockDisplay(display); @@ -2598,7 +2554,6 @@ Status XvMCPutSurface(Display *display,XvMCSurface *surface, XSync(display, 0); XUnlockDisplay(display); - pI915XvMC->attribChanged = 0; PPTHREAD_MUTEX_UNLOCK(pI915XvMC); return Success; @@ -3302,29 +3257,9 @@ Status XvMCGetSubpictureStatus(Display *display, XvMCSubpicture *subpicture, XvAttribute *XvMCQueryAttributes(Display *display, XvMCContext *context, int *number) { - i915XvMCContext *pI915XvMC; - XvAttribute *attributes; - - if (!number) - return NULL; - + /* now XvMC has no extra attribs than Xv */ *number = 0; - - if (!display || !context) - return NULL; - - if (!(pI915XvMC = context->privData)) - return NULL; - - PPTHREAD_MUTEX_LOCK(pI915XvMC); - if (NULL != (attributes = (XvAttribute *) - malloc(I915_NUM_XVMC_ATTRIBUTES * sizeof(XvAttribute)))) { - memcpy(attributes, pI915XvMC->attribDesc, I915_NUM_XVMC_ATTRIBUTES); - *number = I915_NUM_XVMC_ATTRIBUTES; - } - PPTHREAD_MUTEX_UNLOCK(pI915XvMC); - - return attributes; + return NULL; } /*************************************************************************** @@ -3343,52 +3278,6 @@ XvAttribute *XvMCQueryAttributes(Display *display, XvMCContext *context, Status XvMCSetAttribute(Display *display, XvMCContext *context, Atom attribute, int value) { - i915XvMCContext *pI915XvMC; - I915XvMCCommandBuffer buf; - int found = 0; - unsigned i; - - if (!display) - return BadValue; - - if (!context || !(pI915XvMC = context->privData)) - return (error_base + XvMCBadContext); - - PPTHREAD_MUTEX_LOCK(pI915XvMC); - for (i = 0; i < pI915XvMC->attrib.numAttr; ++i) { - if (attribute == pI915XvMC->attrib.attributes[i].attribute) { - if ((!(pI915XvMC->attribDesc[i].flags & XvSettable)) || - value < pI915XvMC->attribDesc[i].min_value || - value > pI915XvMC->attribDesc[i].max_value) { - PPTHREAD_MUTEX_UNLOCK(pI915XvMC); - return BadValue; - } - - pI915XvMC->attrib.attributes[i].value = value; - found = 1; - pI915XvMC->attribChanged = 1; - break; - } - } - - if (!found) { - PPTHREAD_MUTEX_UNLOCK(pI915XvMC); - return BadMatch; - } - - if (pI915XvMC->haveXv) { - buf.command = I915_XVMC_COMMAND_ATTRIBUTES; - pI915XvMC->xvImage->data = (char *)&buf; - buf.ctxNo = pI915XvMC->ctxno | I915_XVMC_VALID; - buf.attrib = pI915XvMC->attrib; - XLockDisplay(display); - pI915XvMC->attribChanged = - XvPutImage(display, pI915XvMC->port, pI915XvMC->draw, - pI915XvMC->gc, pI915XvMC->xvImage, 0, 0, 1, 1, 0, 0, 1, 1); - XUnlockDisplay(display); - } - - PPTHREAD_MUTEX_UNLOCK(pI915XvMC); return Success; } @@ -3410,30 +3299,5 @@ Status XvMCSetAttribute(Display *display, XvMCContext *context, Status XvMCGetAttribute(Display *display, XvMCContext *context, Atom attribute, int *value) { - i915XvMCContext *pI915XvMC; - int found = 0; - unsigned i; - - if (!display || !value) - return BadValue; - - if (!context || !(pI915XvMC = context->privData)) - return (error_base + XvMCBadContext); - - PPTHREAD_MUTEX_LOCK(pI915XvMC); - for (i = 0; i < pI915XvMC->attrib.numAttr; ++i) { - if (attribute == pI915XvMC->attrib.attributes[i].attribute) { - if (pI915XvMC->attribDesc[i].flags & XvGettable) { - *value = pI915XvMC->attrib.attributes[i].value; - found = 1; - break; - } - } - } - PPTHREAD_MUTEX_UNLOCK(pI915XvMC); - - if (!found) - return BadMatch; - return Success; } diff --git a/src/xvmc/I915XvMC.h b/src/xvmc/I915XvMC.h index 4fc9fc59..78aea7d2 100644 --- a/src/xvmc/I915XvMC.h +++ b/src/xvmc/I915XvMC.h @@ -66,13 +66,13 @@ typedef struct _i915XvMCDrmMap { // pointer in the XvMCContext structure. ***************************************************************************/ typedef struct _i915XvMCContext { - unsigned ctxno; + unsigned int ctxno; int fd; /* File descriptor for /dev/dri */ - unsigned last_render; - unsigned last_flip; - unsigned dual_prime; /* Flag to identify when dual prime is in use. */ - unsigned yStride; - unsigned uvStride; + unsigned int last_render; + unsigned int last_flip; + unsigned int dual_prime; /* Flag to identify when dual prime is in use. */ + unsigned int yStride; + unsigned int uvStride; unsigned short ref; pthread_mutex_t ctxmutex; char busIdString[21]; /* PCI:0:1:0 or PCI:0:2:0 */ @@ -84,20 +84,15 @@ typedef struct _i915XvMCContext { drm_context_t hHWContext; /* drmcontext; */ drm_handle_t hsarea; /* Handle to drm shared memory area */ drmAddress sarea_address; /* Virtual address of shared memory area */ - unsigned sarea_size; /* Size of drm shared memory area */ - unsigned sarea_priv_offset; /* Offset in sarea to private part */ - unsigned screen; - unsigned depth; + unsigned int sarea_size; /* Size of drm shared memory area */ + unsigned int sarea_priv_offset; /* Offset in sarea to private part */ + unsigned int screen; + unsigned int depth; XvPortID port; /* Xv Port ID when displaying */ - I915XvMCAttrHolder attrib; /* This contexts attributes and their values */ - XvAttribute attribDesc[I915_NUM_XVMC_ATTRIBUTES]; /* Attribute decriptions */ int haveXv; /* Have I initialized the Xv * connection for this surface? */ XvImage *xvImage; /* Fake Xv Image used for command * buffer transport to the X server */ - int attribChanged; /* Attributes have changed and need to - * be uploaded to Xv at next frame - * display */ GC gc; /* X GC needed for displaying */ Drawable draw; /* Drawable to undisplay from */ XID id; @@ -117,19 +112,19 @@ typedef struct _i915XvMCContext { sigset_t sa_mask; struct { - unsigned start_offset; - unsigned size; - unsigned space; + unsigned int start_offset; + unsigned int size; + unsigned int space; unsigned char *ptr; } batch; struct { void *ptr; - unsigned size; - unsigned offset; - unsigned active_buf; - unsigned irq_emitted; + unsigned int size; + unsigned int offset; + unsigned int active_buf; + unsigned int irq_emitted; } alloc; } i915XvMCContext; @@ -139,10 +134,10 @@ typedef struct _i915XvMCContext { // structure. ***************************************************************************/ typedef struct _i915XvMCSubpicture { - unsigned srfNo; - unsigned last_render; - unsigned last_flip; - unsigned pitch; + unsigned int srfNo; + unsigned int last_render; + unsigned int last_flip; + unsigned int pitch; unsigned char palette[3][16]; i915XvMCDrmMap srf; i915XvMCContext *privContext; @@ -155,13 +150,13 @@ typedef struct _i915XvMCSubpicture { ***************************************************************************/ #define I830_MAX_BUFS 2 /*Number of YUV buffers per surface */ typedef struct _i915XvMCSurface { - unsigned srfNo; /* XvMC private surface numbers */ - unsigned last_render; - unsigned last_flip; - unsigned yStride; /* Stride of YUV420 Y component. */ - unsigned uvStride; - unsigned width; /* Dimensions */ - unsigned height; + unsigned int srfNo; /* XvMC private surface numbers */ + unsigned int last_render; + unsigned int last_flip; + unsigned int yStride; /* Stride of YUV420 Y component. */ + unsigned int uvStride; + unsigned int width; /* Dimensions */ + unsigned int height; i915XvMCDrmMap srf; i915XvMCContext *privContext; i915XvMCSubpicture *privSubPic; /* Subpicture to be blended when |