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authorJerome Glisse <jglisse@redhat.com>2013-04-08 13:45:18 -0400
committerJerome Glisse <jglisse@redhat.com>2013-04-18 17:27:10 -0400
commitb2826580e4d246d45871b413e4deecb070162577 (patch)
tree4cf271c6b734cc43716219a3edb9630991774dca /src
parent6e74aacc5e5da3b51744153dad1645caa6ea4ce3 (diff)
radeonsi: add 2d tiling support
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Diffstat (limited to 'src')
-rw-r--r--src/drmmode_display.c4
-rw-r--r--src/radeon_bo_helper.c4
-rw-r--r--src/radeon_kms.c6
3 files changed, 14 insertions, 0 deletions
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 4c50a1b8..13e65fa3 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -121,6 +121,8 @@ static PixmapPtr drmmode_create_bo_pixmap(ScrnInfoPtr pScrn,
surface->bpe = bpp / 8;
surface->nsamples = 1;
surface->flags = RADEON_SURF_SCANOUT;
+ /* we are requiring a recent enough libdrm version */
+ surface->flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR_ALIGNED, MODE);
if (tiling & RADEON_TILING_MICRO) {
@@ -1351,6 +1353,8 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
surface.bpe = cpp;
surface.nsamples = 1;
surface.flags = RADEON_SURF_SCANOUT;
+ /* we are requiring a recent enough libdrm version */
+ surface.flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
surface.flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
surface.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR_ALIGNED, MODE);
if (tiling_flags & RADEON_TILING_MICRO) {
diff --git a/src/radeon_bo_helper.c b/src/radeon_bo_helper.c
index c5f5ce29..539590cb 100644
--- a/src/radeon_bo_helper.c
+++ b/src/radeon_bo_helper.c
@@ -132,6 +132,8 @@ radeon_alloc_pixmap_bo(ScrnInfoPtr pScrn, int width, int height, int depth,
tiling &= ~RADEON_TILING_MACRO;
}
surface.flags = RADEON_SURF_SCANOUT;
+ /* we are requiring a recent enough libdrm version */
+ surface.flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
surface.flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
surface.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR, MODE);
if ((tiling & RADEON_TILING_MICRO)) {
@@ -224,6 +226,8 @@ Bool radeon_set_shared_pixmap_backing(PixmapPtr ppix, void *fd_handle,
surface->array_size = 1;
surface->bpe = ppix->drawable.bitsPerPixel / 8;
surface->nsamples = 1;
+ /* we are requiring a recent enough libdrm version */
+ surface->flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR, MODE);
if (radeon_surface_best(info->surf_man, surface)) {
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index e4f586c3..fcac885a 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -835,6 +835,10 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
Bool colorTilingDefault =
xorgGetVersion() >= XORG_VERSION_NUMERIC(1,9,4,901,0) &&
info->ChipFamily >= CHIP_FAMILY_R300 &&
+ /* this ARUBA check could be removed sometime after a big mesa release
+ * with proper bit, in the meantime you need to set tiling option in
+ * xorg configuration files
+ */
info->ChipFamily <= CHIP_FAMILY_ARUBA;
/* 2D color tiling */
@@ -1455,6 +1459,8 @@ static Bool radeon_setup_kernel_mem(ScreenPtr pScreen)
surface.bpe = cpp;
surface.nsamples = 1;
surface.flags = RADEON_SURF_SCANOUT;
+ /* we are requiring a recent enough libdrm version */
+ surface.flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
surface.flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
surface.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR_ALIGNED, MODE);
if (tiling_flags & RADEON_TILING_MICRO) {