diff options
| author | Heikki Lindholm <holin@iki.fi> | 2010-08-27 02:26:24 -0400 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2010-08-27 02:26:24 -0400 |
| commit | 91f707d308d4bbf16c3d62d046cf280fef5a8f4c (patch) | |
| tree | aa971b3d0415ce111b43fa2bd996855c66dcdda9 | |
| parent | 6a2c8587a4e05a8be2a2e975a6660942cfe115d6 (diff) | |
xv: fix non-kms/non-dri Xv column ordering on big endian systems
Column order is wrong on big endian systems, primarly because of a
bits / bytes mix up with the bpp variable. Fix tested with r100 and
r300, screen depth 16 and 32 with YV12 and YUY2 (overlay, textured video),
RGBA and RGBT (overlay).
Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=29041
Signed-off-by: Heikki Lindholm <holin@iki.fi>
| -rw-r--r-- | src/radeon_video.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/radeon_video.c b/src/radeon_video.c index dc752797..1a42951c 100644 --- a/src/radeon_video.c +++ b/src/radeon_video.c @@ -2216,11 +2216,15 @@ RADEONCopyData( swap = RADEON_HOST_DATA_SWAP_32BIT; break; } - } else if (bpp != pScrn->bitsPerPixel) { - if (bpp == 8) + } else { + switch (pScrn->bitsPerPixel) { + case 16: + swap = RADEON_HOST_DATA_SWAP_16BIT; + break; + case 32: swap = RADEON_HOST_DATA_SWAP_32BIT; - else - swap = RADEON_HOST_DATA_SWAP_HDW; + break; + } } #endif |