|author||Zhigang Gong <firstname.lastname@example.org>||2014-11-12 13:01:02 +0800|
|committer||Zhigang Gong <email@example.com>||2014-11-13 22:45:56 -0800|
update some documents.
Signed-off-by: Zhigang Gong <firstname.lastname@example.org>
Diffstat (limited to 'Software/Beignet.mdwn')
1 files changed, 19 insertions, 16 deletions
diff --git a/Software/Beignet.mdwn b/Software/Beignet.mdwn
index 7c84f502..eae15941 100644
@@ -122,8 +122,8 @@ Supported Targets
* 3rd Generation Intel Core Processors
* Intel “Bay Trail” platforms with Intel HD Graphics
- * 4th Generation Intel Core Processors, need kernel patch currently, see below
- for details:
+ * 4th Generation Intel Core Processors, need kernel patch currently, see the "Known Issues" section.
+ * 5th Generation Intel Core Processors "Broadwell".
@@ -150,8 +150,8 @@ Known Issues
`# echo 0 > /sys/module/i915/parameters/enable_cmd_parser`
* Some unit test cases, maybe 20 to 30, fail on 4th Generation (HSW) platform.
- The 4th Generation Intel Core Processors's support requires some Linux kernel
- modification. You need to apply the patch at:
+ _The 4th Generation Intel Core Processors's support requires some Linux kernel
+ modification_. You need to apply the patch at:
* Precision issue.
@@ -175,12 +175,12 @@ is also good which is about 99%. There are still some remains work items listed
most of them are extension support and performance related.
- Performance tuning. There are some major optimizations need to be done,
- Peephole optimization, convert to structured BBs and leverage Gen's structured
- instructions, and optimize the extreme slow software based sin/cos/... math
- functions due to the native math instruction lack of necessary precision.
- And all the code is inlined which will increase the icache miss rate
- significantly. And many other things which are specified partially in
+ Peephole optimization, futher tuning the structurized BB transformation to
+ support more pattern such as self loop/while loop. And optimize the slow
+ software based sin/cos/... math functions due to the native math instruction
+ lack of necessary precision. And all the code is inlined which will increase
+ the icache miss rate significantly. And many other things which are specified
+ partially in [[here|Beignet/Backend/TODO]].
- Complete cl\_khr\_gl\_sharing support. We lack of some APIs implementation such
as clCreateFromGLBuffer,clCreateFromGLRenderbuffer,clGetGLObjectInfo... Currently,
@@ -194,9 +194,6 @@ most of them are extension support and performance related.
(i.e. for each NDRangeKernels). This is really inefficient since some
expensive pipe controls are issued for each batch buffer.
-- Valgrind reports some leaks in libdrm. It sounds like a false positive but it
- has to be checked. Idem for LLVM. There is one leak here to check.
More generally, everything in the run-time that triggers the "FATAL" macro means
that something that must be supported is not implemented properly (either it
does not comply with the standard or it is just missing)
@@ -204,7 +201,7 @@ does not comply with the standard or it is just missing)
Right now, we host our project on fdo at:
And the intel 01.org:
@@ -218,8 +215,14 @@ How to contribute
You are always welcome to contribute to this project, just need to subscribe
to the beignet mail list and send patches to it for review.
-The official mail list is as below:
+The official mail list is as below:
+The official bugzilla is at:
+You are welcome to submit beignet bug. Please be noted, please specify the exact platform
+information, such as BYT/IVB/HSW/BDW, and GT1/GT2/GT3. You can easily get this information
+by running the beignet's unit test.
Documents for OpenCL application developers