| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2017-02-18 | PROJECT HAS MOVEDHEADmaster | Sean V Kelley | 1 | -3899/+0 |
| 2017-01-17 | Follow the HW spec to configure the buffer cache on Gen9+ | Zhao Yakui | 1 | -1/+8 |
| 2016-12-28 | Support AVC VDEnc on KBL | Xiang, Haihao | 1 | -16/+215 |
| 2016-12-28 | VDEnc: update the constant buffer | Xiang, Haihao | 1 | -3/+3 |
| 2016-12-28 | VDEnc: update the value of inter rounding for CQP mode | Xiang, Haihao | 1 | -1/+5 |
| 2016-12-28 | VDEnc: update the MFX_AVC_IMG_STATE command | Xiang, Haihao | 1 | -4/+5 |
| 2016-12-28 | VDEnc: always enable bitrate control per mb | Xiang, Haihao | 1 | -0/+1 |
| 2016-12-23 | i965_encoder: consistently represent framerate as a fraction | Mark Thompson | 1 | -12/+16 |
| 2016-11-30 | Don't parse Misc parameters in VDEnc | Xiang, Haihao | 1 | -127/+31 |
| 2016-11-18 | Rename gen9_gpe_mi_store_register_mem() to gen8_gpe_mi_store_register_mem() | Xiang, Haihao | 1 | -5/+5 |
| 2016-11-18 | Rename gen9_gpe_mi_flush_dw() to gen8_gpe_mi_flush_dw() | Xiang, Haihao | 1 | -5/+5 |
| 2016-11-18 | Rename gen9_gpe_mi_store_data_imm() to gen8_gpe_mi_store_data_imm() | Xiang, Haihao | 1 | -2/+2 |
| 2016-11-18 | Rename gen9_gpe_mi_batch_buffer_start() to gen8_gpe_mi_batch_buffer_start() | Xiang, Haihao | 1 | -1/+1 |
| 2016-10-28 | vdenc: Always use the 1st VCS ring | Xiang, Haihao | 1 | -1/+2 |
| 2016-09-16 | Use a 2-dimensional array to store misc parameters | Xiang, Haihao | 1 | -2/+2 |
| 2016-07-27 | Missing 'do' in "do ...while" in macro ALLOC_VDENC_BUFFER_RESOURCE | Lim Siew Hoon | 1 | -1/+1 |
| 2016-05-27 | Add some utility functions for i965_gpe_resources | Zhao Yakui | 1 | -0/+1 |
| 2016-05-24 | Avoid potential NULL pointer access | Xiang, Haihao | 1 | -0/+6 |
| 2016-05-09 | Implement low power mode on SKL | Xiang, Haihao | 1 | -0/+3771 |
