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authorZhao Yakui <yakui.zhao@intel.com>2017-01-17 08:40:18 +0800
committerSean V Kelley <seanvk@posteo.de>2017-01-17 15:03:29 -0800
commitfce75e3a7fe6d61fad0411359406ab291dd3f2c7 (patch)
tree73a2654b43c4919ae5f22d1c319d57b1030138f9 /src/gen75_vpp_vebox.c
parentee9261e895a5b86a2532595629cd9c31fff51747 (diff)
Follow the HW spec to configure the buffer cache on Gen9+
The MOCS field is used to define the cache type for the given buffer. From the SKL+, the MOCS field is interpreted as the index that is used to find the corresponding cache type in kernel driver. The current MOCS setting causes that buffer uses the wrong cache type. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Diffstat (limited to 'src/gen75_vpp_vebox.c')
-rw-r--r--src/gen75_vpp_vebox.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gen75_vpp_vebox.c b/src/gen75_vpp_vebox.c
index 0c52765..eee8e76 100644
--- a/src/gen75_vpp_vebox.c
+++ b/src/gen75_vpp_vebox.c
@@ -2292,12 +2292,13 @@ void skl_veb_state_table_setup(VADriverContextP ctx, struct intel_vebox_context
void
skl_veb_state_command(VADriverContextP ctx, struct intel_vebox_context *proc_ctx)
{
+ struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = proc_ctx->batch;
BEGIN_VEB_BATCH(batch, 0x10);
OUT_VEB_BATCH(batch, VEB_STATE | (0x10 - 2));
OUT_VEB_BATCH(batch,
- 0 << 25 | // state surface control bits
+ ((i965->intel.mocs_state) << 25) | // state surface control bits
0 << 23 | // reserved.
0 << 22 | // gamut expansion position
0 << 15 | // reserved.