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authorKevin Brace <kevinbrace@gmx.com>2018-12-29 19:23:16 -0600
committerKevin Brace <kevinbrace@gmx.com>2018-12-29 19:23:16 -0600
commitda292049e7d4bb4eae67dbb6854cc733ea88b263 (patch)
tree7062ea6c824cd40ba51f69bec1bc7575225195cc
parent8bb5fd902bc948630089a3e6516dacad1e0c95f6 (diff)
Fix for VT disruption when FP is in use
Certain FP related VGA registers were not getting saved during the DDX UMS code initialization, and this was leading to a disrupted VT screen when FP is in use. Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
-rw-r--r--src/via_ums.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/via_ums.c b/src/via_ums.c
index a789e4f..533106f 100644
--- a/src/via_ums.c
+++ b/src/via_ums.c
@@ -1188,7 +1188,7 @@ umsCrtcInit(ScrnInfoPtr pScrn)
Regs->CR[0x47] = hwp->readCrtc(hwp, 0x47);
Regs->CR[0x48] = hwp->readCrtc(hwp, 0x48);
- for (i = 0; i < (0x9F - 0x50 + 1); i++) {
+ for (i = 0; i < (0xA8 - 0x50 + 1); i++) {
Regs->CR[i + 0x50] = hwp->readCrtc(hwp, i + 0x50);
}
@@ -1197,8 +1197,8 @@ umsCrtcInit(ScrnInfoPtr pScrn)
case VIA_VX800:
case VIA_VX855:
case VIA_VX900:
- for (i = 0; i < (0xEF - 0xA0 + 1); i++) {
- Regs->CR[i + 0xA0] = hwp->readCrtc(hwp, i + 0xA0);
+ for (i = 0; i < (0xEF - 0xA9 + 1); i++) {
+ Regs->CR[i + 0xA9] = hwp->readCrtc(hwp, i + 0xA9);
}
break;