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authorJon Nettleton <jon.nettleton@gmail.com>2007-06-14 18:24:51 +0000
committerJon Nettleton <jon.nettleton@gmail.com>2007-06-14 18:24:51 +0000
commitdb6b8ff3de7d43a63caf7178670af9bd27811898 (patch)
treef8345cda8d5acfcdbdcb41e6209d2775b6640827 /src
parentd45b190b7f1ac61d708a1e1a16584aaadd6f1ac5 (diff)
merge unmerged changes from experimental branch
Diffstat (limited to 'src')
-rw-r--r--src/via.h18
-rw-r--r--src/via_accel.c181
-rw-r--r--src/via_bandwidth.c30
-rw-r--r--src/via_dri.c1
-rw-r--r--src/via_driver.c67
-rw-r--r--src/via_driver.h3
-rw-r--r--src/via_id.c36
-rw-r--r--src/via_id.h8
-rw-r--r--src/via_mode.c23
-rw-r--r--src/via_mode.h12
-rw-r--r--src/via_regs.h2
-rw-r--r--src/via_swov.c114
-rw-r--r--src/via_swov.h3
-rw-r--r--src/via_vbe.c16
-rw-r--r--src/via_video.c28
-rw-r--r--src/via_video.h2
-rw-r--r--src/via_xvmc.c4
17 files changed, 426 insertions, 122 deletions
diff --git a/src/via.h b/src/via.h
index e741d774b924..8760073783b2 100644
--- a/src/via.h
+++ b/src/via.h
@@ -32,14 +32,23 @@
#include <stdio.h>
#include <math.h>
+/* Video Engines */
+#define VIDEO_ENGINE_UNK 0 /* Unknown video engine */
+#define VIDEO_ENGINE_CLE 1 /* CLE First generaion video engine */
+#define VIDEO_ENGINE_CME 2 /* CME Second generation video engine */
+
/* Video status flag */
+#define VIDEO_HIDE 0x00000000 /*Video off*/
+#define VIDEO_SHOW 0x80000000 /*Video on*/
+#define VIDEO_ACTIVE 0x10000000 /*Video active*/
#define VIDEO_MPEG_INUSE 0x08000000 /*Video is used with MPEG */
#define VIDEO_HQV_INUSE 0x04000000 /*Video is used with HQV*/
#define VIDEO_CAPTURE0_INUSE 0x02000000 /*Video is used with CAPTURE 0*/
#define VIDEO_CAPTURE1_INUSE 0x00000000 /*Video is used with CAPTURE 1*/
#define VIDEO_1_INUSE 0x01000000 /*Video 1 is used with software flip*/
#define VIDEO_3_INUSE 0x00000000 /*Video 3 is used with software flip*/
+#define VIDEO_ON 0x00100000
#define MPEG_USE_V1 0x00010000 /*[16] : 1:MPEG use V1, 0:MPEG use V3*/
#define MPEG_USE_V3 0x00000000 /*[16] : 1:MPEG use V1, 0:MPEG use V3*/
#define MPEG_USE_HQV 0x00020000 /*[17] : 1:MPEG use HQV,0:MPEG not use HQV*/
@@ -192,7 +201,7 @@
#define RAM_TABLE_CONTROL 0x1C8
#define RAM_TABLE_READ 0x1CC
-/* HQV Registers */
+/* HQV Registers*/
#define HQV_CONTROL 0x1D0
#define HQV_SRC_STARTADDR_Y 0x1D4
#define HQV_SRC_STARTADDR_U 0x1D8
@@ -252,6 +261,8 @@
#define V1_ON_SND_DISPLAY 0x80000000
#define V1_FIFO_32V1_32V2 0x00000000
#define V1_FIFO_48V1_32V2 0x00200000
+#define V1_PREFETCH_ON_3336 0x40000000 /*V1_PREFETCH_ON*/
+#define V1_GAMMA_ENABLE_3336 0x20000000 /*V1_Gamma_ENABLE*/
/* V12_QWORD_PER_LINE 0x234 */
#define V1_FETCH_COUNT 0x3ff00000
@@ -311,6 +322,11 @@
#define V1_FIFO_PRETHRESHOLD56 0x38000000
#define V1_FIFO_PRETHRESHOLD61 0x3D000000
+#define VIDEO_FIFO_DEPTH_VT3336 225
+#define VIDEO_FIFO_THRESHOLD_VT3336 200
+#define VIDEO_FIFO_PRETHRESHOLD_VT3336 250
+#define VIDEO_EXPIRE_NUM_VT3336 31
+
/* ALPHA_V3_FIFO_CONTROL 0x278
* IA2 has 32 level FIFO for packet mode video format
* 32 level FIFO for planar mode video YV12. with extension reg 230 bit 21 enable
diff --git a/src/via_accel.c b/src/via_accel.c
index e4cf82e52021..90a485d1df26 100644
--- a/src/via_accel.c
+++ b/src/via_accel.c
@@ -108,11 +108,14 @@ viaFlushPCI(ViaCommandBuffer * buf)
* for an unacceptable amount of time in VIASETREG while
* other high priority interrupts may be pending.
*/
- while (!(VIAGETREG(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY)
- && (loop++ < MAXLOOP)) ;
- while ((VIAGETREG(VIA_REG_STATUS) & (VIA_CMD_RGTR_BUSY |
- VIA_2D_ENG_BUSY))
- && (loop++ < MAXLOOP)) ;
+ if (pVia->Chipset != VIA_P4M890 && pVia->Chipset != VIA_K8M890 &&
+ pVia->Chipset != VIA_P4M900) {
+ while (!(VIAGETREG(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY)
+ && (loop++ < MAXLOOP)) ;
+ }
+ while ((VIAGETREG(VIA_REG_STATUS) &
+ (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY)) &&
+ (loop++ < MAXLOOP)) ;
}
offset = (*bp++ & 0x0FFFFFFF) << 2;
value = *bp++;
@@ -224,6 +227,13 @@ viaTearDownCBuffer(ViaCommandBuffer * buf)
/*
* Leftover from VIA's code.
*/
+static void
+viaInitPCIe(VIAPtr pVia)
+{
+ VIASETREG(0x41c, 0x00100000);
+ VIASETREG(0x420, 0x680A0000);
+ VIASETREG(0x420, 0x02000000);
+}
static void
viaInitAgp(VIAPtr pVia)
@@ -250,38 +260,60 @@ viaInitAgp(VIAPtr pVia)
*/
static void
-viaEnableVQ(VIAPtr pVia)
-{
- CARD32
- vqStartAddr = pVia->VQStart,
- vqEndAddr = pVia->VQEnd,
- vqStartL = 0x50000000 | (vqStartAddr & 0xFFFFFF),
- vqEndL = 0x51000000 | (vqEndAddr & 0xFFFFFF),
- vqStartEndH = 0x52000000 | ((vqStartAddr & 0xFF000000) >> 24) |
- ((vqEndAddr & 0xFF000000) >> 16),
- vqLen = 0x53000000 | (VIA_VQ_SIZE >> 3);
-
- VIASETREG(VIA_REG_TRANSET, 0x00fe0000);
- VIASETREG(VIA_REG_TRANSPACE, 0x080003fe);
- VIASETREG(VIA_REG_TRANSPACE, 0x0a00027c);
- VIASETREG(VIA_REG_TRANSPACE, 0x0b000260);
- VIASETREG(VIA_REG_TRANSPACE, 0x0c000274);
- VIASETREG(VIA_REG_TRANSPACE, 0x0d000264);
- VIASETREG(VIA_REG_TRANSPACE, 0x0e000000);
- VIASETREG(VIA_REG_TRANSPACE, 0x0f000020);
- VIASETREG(VIA_REG_TRANSPACE, 0x1000027e);
- VIASETREG(VIA_REG_TRANSPACE, 0x110002fe);
- VIASETREG(VIA_REG_TRANSPACE, 0x200f0060);
-
- VIASETREG(VIA_REG_TRANSPACE, 0x00000006);
- VIASETREG(VIA_REG_TRANSPACE, 0x40008c0f);
- VIASETREG(VIA_REG_TRANSPACE, 0x44000000);
- VIASETREG(VIA_REG_TRANSPACE, 0x45080c04);
- VIASETREG(VIA_REG_TRANSPACE, 0x46800408);
- VIASETREG(VIA_REG_TRANSPACE, vqStartEndH);
- VIASETREG(VIA_REG_TRANSPACE, vqStartL);
- VIASETREG(VIA_REG_TRANSPACE, vqEndL);
- VIASETREG(VIA_REG_TRANSPACE, vqLen);
+viaEnableAgpVQ(VIAPtr pVia)
+{
+ CARD32
+ vqStartAddr = pVia->VQStart,
+ vqEndAddr = pVia->VQEnd,
+ vqStartL = 0x50000000 | (vqStartAddr & 0xFFFFFF),
+ vqEndL = 0x51000000 | (vqEndAddr & 0xFFFFFF),
+ vqStartEndH = 0x52000000 | ((vqStartAddr & 0xFF000000) >> 24) |
+ ((vqEndAddr & 0xFF000000) >> 16),
+ vqLen = 0x53000000 | (VIA_VQ_SIZE >> 3);
+
+
+ VIASETREG(VIA_REG_TRANSET, 0x00fe0000);
+ VIASETREG(VIA_REG_TRANSPACE, 0x080003fe);
+ VIASETREG(VIA_REG_TRANSPACE, 0x0a00027c);
+ VIASETREG(VIA_REG_TRANSPACE, 0x0b000260);
+ VIASETREG(VIA_REG_TRANSPACE, 0x0c000274);
+ VIASETREG(VIA_REG_TRANSPACE, 0x0d000264);
+ VIASETREG(VIA_REG_TRANSPACE, 0x0e000000);
+ VIASETREG(VIA_REG_TRANSPACE, 0x0f000020);
+ VIASETREG(VIA_REG_TRANSPACE, 0x1000027e);
+ VIASETREG(VIA_REG_TRANSPACE, 0x110002fe);
+ VIASETREG(VIA_REG_TRANSPACE, 0x200f0060);
+ VIASETREG(VIA_REG_TRANSPACE, 0x00000006);
+ VIASETREG(VIA_REG_TRANSPACE, 0x40008c0f);
+ VIASETREG(VIA_REG_TRANSPACE, 0x44000000);
+ VIASETREG(VIA_REG_TRANSPACE, 0x45080c04);
+ VIASETREG(VIA_REG_TRANSPACE, 0x46800408);
+
+ VIASETREG(VIA_REG_TRANSPACE, vqStartEndH);
+ VIASETREG(VIA_REG_TRANSPACE, vqStartL);
+ VIASETREG(VIA_REG_TRANSPACE, vqEndL);
+ VIASETREG(VIA_REG_TRANSPACE, vqLen);
+}
+
+static void
+viaEnablePCIeVQ(VIAPtr pVia)
+{
+ CARD32
+ vqStartAddr = pVia->VQStart,
+ vqEndAddr = pVia->VQEnd,
+ vqStartL = 0x70000000 | (vqStartAddr & 0xFFFFFF),
+ vqEndL = 0x71000000 | (vqEndAddr & 0xFFFFFF),
+ vqStartEndH = 0x72000000 | ((vqStartAddr & 0xFF000000) >> 24) |
+ ((vqEndAddr & 0xFF000000) >> 16),
+ vqLen = 0x73000000 | (VIA_VQ_SIZE >> 3);
+
+ VIASETREG(0x41c, 0x00100000);
+ VIASETREG(0x420, vqStartEndH);
+ VIASETREG(0x420, vqStartL);
+ VIASETREG(0x420, vqEndL);
+ VIASETREG(0x420, vqLen);
+ VIASETREG(0x420, 0x74301001);
+ VIASETREG(0x420, 0x00000000);
}
/*
@@ -293,12 +325,22 @@ viaDisableVQ(ScrnInfoPtr pScrn)
{
VIAPtr pVia = VIAPTR(pScrn);
- VIASETREG(VIA_REG_TRANSET, 0x00fe0000);
- VIASETREG(VIA_REG_TRANSPACE, 0x00000004);
- VIASETREG(VIA_REG_TRANSPACE, 0x40008c0f);
- VIASETREG(VIA_REG_TRANSPACE, 0x44000000);
- VIASETREG(VIA_REG_TRANSPACE, 0x45080c04);
- VIASETREG(VIA_REG_TRANSPACE, 0x46800408);
+ switch ( pVia->Chipset )
+ {
+ case VIA_P4M890:
+ case VIA_K8M890:
+ VIASETREG(0x41c, 0x00100000);
+ VIASETREG(0x420, 0x74301000);
+ break;
+ default:
+ VIASETREG(VIA_REG_TRANSET, 0x00fe0000);
+ VIASETREG(VIA_REG_TRANSPACE, 0x00000004);
+ VIASETREG(VIA_REG_TRANSPACE, 0x40008c0f);
+ VIASETREG(VIA_REG_TRANSPACE, 0x44000000);
+ VIASETREG(VIA_REG_TRANSPACE, 0x45080c04);
+ VIASETREG(VIA_REG_TRANSPACE, 0x46800408);
+ break;
+ }
}
/*
@@ -347,10 +389,24 @@ viaInitialize2DEngine(ScrnInfoPtr pScrn)
VIASETREG(i, 0x0);
}
- viaInitAgp(pVia);
+ switch( pVia->Chipset ) {
+ case VIA_K8M890:
+ viaInitPCIe(pVia);
+ break;
+ default:
+ viaInitAgp(pVia);
+ break;
+ }
if (pVia->VQStart != 0) {
- viaEnableVQ(pVia);
+ switch( pVia->Chipset ) {
+ case VIA_K8M890:
+ viaEnablePCIeVQ(pVia);
+ break;
+ default:
+ viaEnableAgpVQ(pVia);
+ break;
+ }
} else {
viaDisableVQ(pScrn);
}
@@ -370,12 +426,23 @@ viaAccelSync(ScrnInfoPtr pScrn)
mem_barrier();
- while (!(VIAGETREG(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY)
- && (loop++ < MAXLOOP)) ;
+ switch (pVia->Chipset) {
+ case VIA_P4M890:
+ case VIA_K8M890:
+ case VIA_P4M900:
+ while ((VIAGETREG(VIA_REG_STATUS) &
+ (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY)) &&
+ (loop++ < MAXLOOP)) ;
+ break;
+ default:
+ while (!(VIAGETREG(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY)
+ && (loop++ < MAXLOOP)) ;
- while ((VIAGETREG(VIA_REG_STATUS) &
- (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | VIA_3D_ENG_BUSY)) &&
- (loop++ < MAXLOOP)) ;
+ while ((VIAGETREG(VIA_REG_STATUS) &
+ (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | VIA_3D_ENG_BUSY)) &&
+ (loop++ < MAXLOOP)) ;
+ break;
+ }
}
/*
@@ -1106,7 +1173,7 @@ viaInitXAA(ScreenPtr pScreen)
* test with x11perf -shmput500!
*/
- if (pVia->Chipset != VIA_K8M800)
+ if (pVia->Chipset != VIA_K8M800 && pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900)
xaaptr->ImageWriteFlags |= NO_GXCOPY;
xaaptr->SetupForImageWrite = viaSetupForImageWrite;
@@ -2129,8 +2196,8 @@ viaInitExa(ScreenPtr pScreen)
pExa->offScreenBase = pScrn->virtualY * pVia->Bpl;
pExa->pixmapOffsetAlign = 32;
pExa->pixmapPitchAlign = 16;
- pExa->flags = EXA_OFFSCREEN_PIXMAPS |
- (pVia->nPOT[1] ? 0 : EXA_OFFSCREEN_ALIGN_POT);
+ /* This needs to be fixed upstream for now it just causes hangs*/
+ pExa->flags = EXA_OFFSCREEN_PIXMAPS | EXA_OFFSCREEN_ALIGN_POT;
pExa->maxX = 2047;
pExa->maxY = 2047;
pExa->WaitMarker = viaAccelWaitMarker;
@@ -2174,6 +2241,7 @@ viaInitExa(ScreenPtr pScreen)
"[EXA] Disabling EXA accelerated composite.\n");
}
+
if (!exaDriverInit(pScreen, pExa)) {
xfree(pExa);
return NULL;
@@ -2279,13 +2347,13 @@ viaInitAccel(ScreenPtr pScreen)
pVia->FBFreeEnd -= VIA_VQ_SIZE;
}
- viaInitialize2DEngine(pScrn);
-
if (pVia->hwcursor) {
pVia->FBFreeEnd -= VIA_CURSOR_SIZE;
pVia->CursorStart = pVia->FBFreeEnd;
}
+ viaInitialize2DEngine(pScrn);
+
/*
* Sync marker space.
*/
@@ -2332,6 +2400,9 @@ viaInitAccel(ScreenPtr pScreen)
return FALSE;
}
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "[EXA] Trying to enable EXA acceleration.\n");
+
pVia->driSize = (pVia->FBFreeEnd - pVia->FBFreeStart) / 2;
if ((pVia->driSize > (pVia->maxDriSize * 1024))
diff --git a/src/via_bandwidth.c b/src/via_bandwidth.c
index 569d4f522c18..672b2b16d417 100644
--- a/src/via_bandwidth.c
+++ b/src/via_bandwidth.c
@@ -226,7 +226,15 @@ ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
else
ViaSeqMask(hwp, 0x22, 0x00, 0x1F);
break;
-
+ case VIA_K8M890:
+ case VIA_P4M900:
+ hwp->writeSeq(hwp, 0x16, 0x92);
+ hwp->writeSeq(hwp, 0x17, 0xB3);
+ hwp->writeSeq(hwp, 0x18, 0x8A);
+ break;
+ case VIA_P4M890:
+ case VIA_CX700:
+ break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetPrimaryFIFO:"
" Chipset %d not implemented\n", pVia->Chipset);
@@ -343,6 +351,26 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
else
ViaCrtcMask(hwp, 0x94, 0x20, 0x7F);
break;
+ case VIA_P4M890:
+ case VIA_K8M890:
+ case VIA_P4M900:
+ break;
+ case VIA_CX700:
+ ViaCrtcMask(hwp, 0x68, 0xA0, 0xF0);
+ ViaCrtcMask(hwp, 0x94, 0x00, 0x80);
+ ViaCrtcMask(hwp, 0x95, 0x00, 0x80);
+
+ ViaCrtcMask(hwp, 0x68, 0x04, 0x0F);
+ ViaCrtcMask(hwp, 0x95, 0x10, 0x70);
+
+ ViaCrtcMask(hwp, 0x92, 0x08, 0x0F);
+ ViaCrtcMask(hwp, 0x95, 0x00, 0x07);
+
+ if ((mode->HDisplay >= 1400) && (pScrn->bitsPerPixel == 32))
+ ViaCrtcMask(hwp, 0x94, 0x10, 0x7F);
+ else
+ ViaCrtcMask(hwp, 0x94, 0x20, 0x7F);
+ break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetSecondaryFIFO:"
" Chipset %d not implemented\n", pVia->Chipset);
diff --git a/src/via_dri.c b/src/via_dri.c
index c109d770c377..30da5e8b77dc 100644
--- a/src/via_dri.c
+++ b/src/via_dri.c
@@ -185,6 +185,7 @@ VIADRIRingBufferInit(ScrnInfoPtr pScrn)
switch (pVia->ChipId) {
case PCI_CHIP_VT3314:
case PCI_CHIP_VT3259:
+ case PCI_CHIP_VT3324:
pVIADRI->reg_pause_addr = 0x40c;
break;
default:
diff --git a/src/via_driver.c b/src/via_driver.c
index d9fee9403282..306142d74a01 100644
--- a/src/via_driver.c
+++ b/src/via_driver.c
@@ -106,6 +106,10 @@ static SymTabRec VIAChipsets[] = {
{VIA_K8M800, "K8M800"},
{VIA_PM800, "PM800/PM880/CN400"},
{VIA_VM800, "VM800/CN700/P4M800Pro"},
+ {VIA_K8M890, "K8M890"},
+ {VIA_P4M900, "P4M900"},
+ {VIA_CX700, "CX700"},
+ {VIA_P4M890, "P4M890"},
{-1, NULL }
};
@@ -117,6 +121,10 @@ static PciChipsets VIAPciChipsets[] = {
{VIA_K8M800, PCI_CHIP_VT3204, RES_SHARED_VGA},
{VIA_PM800, PCI_CHIP_VT3259, RES_SHARED_VGA},
{VIA_VM800, PCI_CHIP_VT3314, RES_SHARED_VGA},
+ {VIA_K8M890, PCI_CHIP_VT3336, RES_SHARED_VGA},
+ {VIA_P4M900, PCI_CHIP_VT3364, RES_SHARED_VGA},
+ {VIA_CX700, PCI_CHIP_VT3324, RES_SHARED_VGA},
+ {VIA_P4M890, PCI_CHIP_VT3327, RES_SHARED_VGA},
{-1, -1, RES_UNDEFINED}
};
@@ -702,6 +710,7 @@ static Bool VIASetupDefaultOptions(ScrnInfoPtr pScrn)
pVia->maxDriSize = 0;
pVia->agpMem = AGP_SIZE / 1024;
pVia->ActiveDevice = 0x00;
+ pVia->VideoEngine = VIDEO_ENGINE_CLE;
#ifdef HAVE_DEBUG
pVia->PrintVGARegs = FALSE;
#endif
@@ -714,6 +723,16 @@ static Bool VIASetupDefaultOptions(ScrnInfoPtr pScrn)
case VIA_K8M800:
pVia->DRIIrqEnable = FALSE;
break;
+ case VIA_K8M890:
+ case VIA_P4M900:
+ pVia->VideoEngine = VIDEO_ENGINE_CME;
+ pVia->agpEnable = FALSE;
+ break;
+ case VIA_PM800:
+ case VIA_CX700:
+ case VIA_P4M890:
+ pVia->VideoEngine = VIDEO_ENGINE_CME;
+ break;
}
return TRUE;
@@ -1333,6 +1352,8 @@ static Bool VIAPreInit(ScrnInfoPtr pScrn, int flags)
xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset);
+ xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset);
+
pVia->PciTag = pciTag(pVia->PciInfo->bus, pVia->PciInfo->device,
pVia->PciInfo->func);
@@ -1479,8 +1500,11 @@ static Bool VIAPreInit(ScrnInfoPtr pScrn, int flags)
if (pBIOSInfo->PanelActive && ((pVia->Chipset == VIA_K8M800) ||
(pVia->Chipset == VIA_PM800) ||
- (pVia->Chipset == VIA_VM800))) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Panel on K8M800, PM800 or VM800 is"
+ (pVia->Chipset == VIA_VM800) ||
+ (pVia->Chipset == VIA_P4M890) ||
+ (pVia->Chipset == VIA_K8M890) ||
+ (pVia->Chipset == VIA_P4M900))) {
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Panel on K8M800, PM800 ,VM800, P4M890, K8M890 or P4M900 is"
" currently not supported.\n");
xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Using VBE to set modes to"
" work around this.\n");
@@ -1759,8 +1783,8 @@ static void VIALeaveVT(int scrnIndex, int flags)
/*
* A soft reset helps fix 3D hang on VT switch.
*/
-
- hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
+ if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900)
+ hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
#ifdef XF86DRI
if (pVia->directRenderingEnabled) {
@@ -1857,10 +1881,28 @@ VIASave(ScrnInfoPtr pScrn)
Regs->SR2E = hwp->readSeq(hwp, 0x2E);
- Regs->SR44 = hwp->readSeq(hwp, 0x44);
- Regs->SR45 = hwp->readSeq(hwp, 0x45);
- Regs->SR46 = hwp->readSeq(hwp, 0x46);
- Regs->SR47 = hwp->readSeq(hwp, 0x47);
+ switch (pVia->Chipset)
+ {
+ case VIA_CLE266:
+ case VIA_KM400:
+ Regs->SR44 = hwp->readSeq(hwp, 0x44);
+ Regs->SR45 = hwp->readSeq(hwp, 0x45);
+ Regs->SR46 = hwp->readSeq(hwp, 0x46);
+ Regs->SR47 = hwp->readSeq(hwp, 0x47);
+ break;
+ default:
+ Regs->SR44 = hwp->readSeq(hwp, 0x44);
+ Regs->SR45 = hwp->readSeq(hwp, 0x45);
+ Regs->SR46 = hwp->readSeq(hwp, 0x46);
+ Regs->SR47 = hwp->readSeq(hwp, 0x47);
+ /*Regs->SR4A = hwp->readSeq(hwp, 0x4a);
+ Regs->SR4B = hwp->readSeq(hwp, 0x4b);
+ Regs->SR4C = hwp->readSeq(hwp, 0x4c);*/
+ break;
+ }
+
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Crtc...\n"));
Regs->CR13 = hwp->readCrtc(hwp, 0x13);
@@ -2272,10 +2314,11 @@ VIAScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
if (!VIAMapMMIO(pScrn))
return FALSE;
- if (pVia->pVbe && pVia->vbeSR)
+ if (pVia->pVbe && pVia->vbeSR) {
ViaVbeSaveRestore(pScrn, MODE_SAVE);
- else
+ } else {
VIASave(pScrn);
+ }
vgaHWUnlock(hwp);
@@ -2577,8 +2620,8 @@ static Bool VIACloseScreen(int scrnIndex, ScreenPtr pScreen)
/* A soft reset Fixes 3D Hang after X restart */
-
- hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
+ if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900)
+ hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
if (!pVia->IsSecondary) {
/* Turn off all video activities */
diff --git a/src/via_driver.h b/src/via_driver.h
index 0341dda7150d..c85f37073240 100644
--- a/src/via_driver.h
+++ b/src/via_driver.h
@@ -26,7 +26,7 @@
#ifndef _VIA_DRIVER_H_
#define _VIA_DRIVER_H_ 1
-#define HAVE_DEBUG
+#define HAVE_DEBUG 1
#ifdef HAVE_DEBUG
#define DEBUG(x) x
@@ -346,6 +346,7 @@ typedef struct _VIA {
CARD32 CursorMC;
/* Video */
+ int VideoEngine;
swovRec swov;
CARD32 VideoStatus;
VIAHWDiff HWDiff;
diff --git a/src/via_id.c b/src/via_id.c
index 8f7801c518b3..cb8b0be89051 100644
--- a/src/via_id.c
+++ b/src/via_id.c
@@ -166,7 +166,7 @@ static struct ViaCardIdStruct ViaCardId[] = {
{"ASRock P4VM8", VIA_PM800, 0x1849, 0x3118, VIA_DEVICE_CRT},
{"Chaintech MPM800-3", VIA_PM800, 0x270F, 0x7671, VIA_DEVICE_CRT},
{"MaxSelect Optima C4", VIA_PM800, 0x1558, 0x5402, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
- /* VM800 */
+ /* VN800 */
{"Clevo/RoverBook Partner E419L", VIA_VM800, 0x1019, 0x0F75, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
{"ECS P4M800PRO-M", VIA_VM800, 0x1019, 0x2122, VIA_DEVICE_CRT},
{"ECS C7VCM", VIA_VM800, 0x1019, 0xAA2D, VIA_DEVICE_CRT},
@@ -188,6 +188,23 @@ static struct ViaCardIdStruct ViaCardId[] = {
{"Fujitsu/Siemens Amilo L7320", VIA_VM800, 0x1734, 0x10CD, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
{"ASRock P4VM800", VIA_VM800, 0x1849, 0x3344, VIA_DEVICE_CRT},
{"Asustek P5V800-MX", VIA_VM800, 0x3344, 0x1122, VIA_DEVICE_CRT},
+ /* K8M890 */
+ {"ASUS A8V-VM", VIA_K8M890, 0x1043, 0x81B5, VIA_DEVICE_CRT},
+ {"Shuttle FX22V1", VIA_K8M890, 0x1297, 0x3080, VIA_DEVICE_CRT},
+ {"MSI K9VGM-V", VIA_K8M890, 0x1462, 0x7253, VIA_DEVICE_CRT},
+ {"Averatec 226x", VIA_K8M890, 0x14FF, 0xA002, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+ /* P4M900 */
+ {"VIA VT3364 (P4M900)", VIA_P4M900, 0x1106, 0x3371, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+ {"Fujitsu/Siemens Amilo Pro V3515", VIA_P4M900, 0x1734, 0x10CB, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+ {"Fujitsu/Siemens Amilo Li1705", VIA_P4M900, 0x1734, 0x10F7, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+ /* CX700 */
+ {"VIA VT3324 (CX700)", VIA_CX700, 0x1106, 0x3157, VIA_DEVICE_CRT},
+ /* P4M890 */
+ {"ASUS P5V-VM ULTRA", VIA_P4M890, 0x1043, 0x81B5, VIA_DEVICE_CRT},
+ {"Asustek P5V-VM DH", VIA_P4M890, 0x1043, 0x81CE, VIA_DEVICE_CRT},
+ {"Mitac 8615", VIA_P4M890, 0x1071, 0x8615, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+ {"VIA VT3343 (P4M890)", VIA_P4M890, 0x1106, 0x3343, VIA_DEVICE_CRT},
+ {"MSI P4M890M-L/IL (MS-7255)", VIA_P4M890, 0x1462, 0x7255, VIA_DEVICE_CRT},
/* keep this */
{NULL, VIA_UNKNOWN, 0x0000, 0x0000, VIA_DEVICE_NONE}
};
@@ -203,9 +220,9 @@ ViaDoubleCheckCLE266Revision(ScrnInfoPtr pScrn)
VIAPtr pVia = VIAPTR(pScrn);
/* Crtc 0x4F is only defined in CLE266Cx */
CARD8 tmp = hwp->readCrtc(hwp, 0x4F);
-
+
hwp->writeCrtc(hwp, 0x4F, 0x55);
-
+
if (hwp->readCrtc(hwp, 0x4F) == 0x55) {
if (CLE266_REV_IS_AX(pVia->ChipRev))
xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "CLE266 Revision seems"
@@ -226,14 +243,14 @@ ViaCheckCardId(ScrnInfoPtr pScrn)
{
struct ViaCardIdStruct *Id;
VIAPtr pVia = VIAPTR(pScrn);
-
+
if ((pVia->PciInfo->subsysVendor == pVia->PciInfo->vendor) &&
(pVia->PciInfo->subsysCard == pVia->PciInfo->chipType))
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Manufacturer plainly copied main PCI IDs to subsystem/card IDs.\n");
for (Id = ViaCardId; Id->String; Id++) {
- if ((Id->Chip == pVia->Chipset) &&
+ if ((Id->Chip == pVia->Chipset) &&
(Id->Vendor == pVia->PciInfo->subsysVendor) &&
(Id->Device == pVia->PciInfo->subsysCard)) {
xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Detected %s.\n", Id->String);
@@ -241,9 +258,10 @@ ViaCheckCardId(ScrnInfoPtr pScrn)
return;
}
}
-
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Unknown Card-IDs (%4X|%4X); please report to <openchrome-users@openchrome.org>\n",
- pVia->PciInfo->subsysVendor, pVia->PciInfo->subsysCard);
+
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Unknown Card-Ids (%4X|%4X); please report to openchrome-users@openchrome.org\n",
+ pVia->PciInfo->subsysVendor, pVia->PciInfo->subsysCard);
pVia->Id = NULL;
}
+
diff --git a/src/via_id.h b/src/via_id.h
index bccaa714514a..514174bf0acb 100644
--- a/src/via_id.h
+++ b/src/via_id.h
@@ -34,6 +34,10 @@ enum VIACHIPTAGS {
VIA_K8M800,
VIA_PM800,
VIA_VM800,
+ VIA_K8M890,
+ VIA_P4M900,
+ VIA_CX700,
+ VIA_P4M890,
VIA_LAST
};
@@ -56,6 +60,10 @@ enum VIACHIPTAGS {
#define PCI_CHIP_CLE3122 0x3122 /* CLE266 */
#define PCI_CHIP_VT3205 0x7205 /* KM400 */
#define PCI_CHIP_VT3314 0x3344 /* VM800 */
+#define PCI_CHIP_VT3336 0x3230 /* K8M890 */
+#define PCI_CHIP_VT3364 0x3371 /* P4M900 */
+#define PCI_CHIP_VT3324 0x3157 /* CX700 */
+#define PCI_CHIP_VT3327 0x3343 /* P4M890 */
/*
* There is also quite some conflicting information on the
diff --git a/src/via_mode.c b/src/via_mode.c
index 94f0dca97de3..155211d2ad70 100644
--- a/src/via_mode.c
+++ b/src/via_mode.c
@@ -794,6 +794,14 @@ ViaGetMemoryBandwidth(ScrnInfoPtr pScrn)
return ViaBandwidthTable[VIA_BW_PM800].Bandwidth[pVia->MemClk];
case VIA_VM800:
return ViaBandwidthTable[VIA_BW_VM800].Bandwidth[pVia->MemClk];
+ case VIA_K8M890:
+ return ViaBandwidthTable[VIA_BW_K8M890].Bandwidth[pVia->MemClk];
+ case VIA_P4M900:
+ return ViaBandwidthTable[VIA_BW_P4M900].Bandwidth[pVia->MemClk];
+ case VIA_CX700:
+ return ViaBandwidthTable[VIA_BW_CX700].Bandwidth[pVia->MemClk];
+ case VIA_P4M890:
+ return ViaBandwidthTable[VIA_BW_P4M890].Bandwidth[pVia->MemClk];
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaBandwidthAllowed: Unknown Chipset.\n");
return VIA_BW_MIN;
@@ -1713,7 +1721,10 @@ ViaModePrimary(ScrnInfoPtr pScrn, DisplayModePtr mode)
is removed -- copy from clock handling code below */
if ((pVia->Chipset == VIA_CLE266) && CLE266_REV_IS_AX(pVia->ChipRev))
ViaSetPrimaryDotclock(pScrn, 0x471C); /* CLE266Ax use 2x XCLK */
- else if ((pVia->Chipset == VIA_K8M800) || (pVia->Chipset == VIA_PM800) || (pVia->Chipset == VIA_VM800))
+ else if ((pVia->Chipset == VIA_K8M800) || (pVia->Chipset == VIA_PM800) ||
+ (pVia->Chipset == VIA_VM800) || (pVia->Chipset == VIA_K8M890) ||
+ (pVia->Chipset == VIA_P4M900) || (pVia->Chipset == VIA_CX700) ||
+ (pVia->Chipset == VIA_P4M890))
ViaSetPrimaryDotclock(pScrn, 0x529001);
else
ViaSetPrimaryDotclock(pScrn, 0x871C);
@@ -1728,11 +1739,17 @@ ViaModePrimary(ScrnInfoPtr pScrn, DisplayModePtr mode)
if (pBIOSInfo->ClockExternal) {
if ((pVia->Chipset == VIA_CLE266) && CLE266_REV_IS_AX(pVia->ChipRev))
ViaSetPrimaryDotclock(pScrn, 0x471C); /* CLE266Ax use 2x XCLK */
- else if ((pVia->Chipset == VIA_K8M800) || (pVia->Chipset == VIA_PM800) ||(pVia->Chipset == VIA_VM800))
+ else if ((pVia->Chipset == VIA_K8M800) || (pVia->Chipset == VIA_PM800) ||
+ (pVia->Chipset == VIA_VM800) || (pVia->Chipset == VIA_K8M890) ||
+ (pVia->Chipset == VIA_P4M900) || (pVia->Chipset == VIA_CX700) ||
+ (pVia->Chipset == VIA_P4M890))
ViaSetPrimaryDotclock(pScrn, 0x529001);
else
ViaSetPrimaryDotclock(pScrn, 0x871C);
- if ((pVia->Chipset != VIA_K8M800) && (pVia->Chipset != VIA_PM800) && (pVia->Chipset != VIA_VM800))
+ if ((pVia->Chipset != VIA_K8M800) && (pVia->Chipset != VIA_PM800) &&
+ (pVia->Chipset != VIA_VM800) && (pVia->Chipset != VIA_K8M890) &&
+ (pVia->Chipset != VIA_P4M900) && (pVia->Chipset != VIA_CX700) &&
+ (pVia->Chipset != VIA_P4M890))
ViaCrtcMask(hwp, 0x6B, 0x01, 0x01);
} else {
ViaSetPrimaryDotclock(pScrn, pBIOSInfo->Clock);
diff --git a/src/via_mode.h b/src/via_mode.h
index ea7bb871cc28..f0bfccabb706 100644
--- a/src/via_mode.h
+++ b/src/via_mode.h
@@ -41,7 +41,11 @@
#define VIA_BW_K8M800 4
#define VIA_BW_PM800 5
#define VIA_BW_VM800 6
-#define VIA_BW_ALL 7
+#define VIA_BW_K8M890 7
+#define VIA_BW_P4M900 8
+#define VIA_BW_CX700 9
+#define VIA_BW_P4M890 10
+#define VIA_BW_ALL 11
/*
* 393216000 is for SDR133 in via_refresh.h
@@ -57,7 +61,11 @@ static struct {
{ VIA_BW_KM400A, { VIA_BW_MIN, VIA_BW_MIN, VIA_BW_MIN, 394000000, 461000000, 461000000, 461000000, VIA_BW_MIN } },
{ VIA_BW_K8M800, { VIA_BW_MIN, VIA_BW_MIN, VIA_BW_MIN, 394000000, 461000000, 461000000, 461000000, VIA_BW_MIN } },
{ VIA_BW_PM800, { VIA_BW_MIN, VIA_BW_MIN, VIA_BW_MIN, 394000000, 461000000, 461000000, 461000000, 922000000 } },
- { VIA_BW_VM800, { VIA_BW_MIN, VIA_BW_MIN, VIA_BW_MIN, 394000000, 461000000, 461000000, 461000000, 922000000 } }
+ { VIA_BW_VM800, { VIA_BW_MIN, VIA_BW_MIN, VIA_BW_MIN, 394000000, 461000000, 461000000, 461000000, 922000000 } },
+ { VIA_BW_K8M890, { VIA_BW_MIN, VIA_BW_MIN, VIA_BW_MIN, 394000000, 461000000, 461000000, 461000000, 922000000 } },
+ { VIA_BW_P4M900, { VIA_BW_MIN, VIA_BW_MIN, VIA_BW_MIN, 394000000, 461000000, 461000000, 461000000, 922000000 } },
+ { VIA_BW_CX700, { VIA_BW_MIN, VIA_BW_MIN, VIA_BW_MIN, 394000000, 461000000, 461000000, 461000000, 922000000 } },
+ { VIA_BW_P4M890, { VIA_BW_MIN, VIA_BW_MIN, VIA_BW_MIN, 394000000, 461000000, 461000000, 461000000, 922000000 } }
};
/*
diff --git a/src/via_regs.h b/src/via_regs.h
index 2440451c12de..65383884f89f 100644
--- a/src/via_regs.h
+++ b/src/via_regs.h
@@ -42,7 +42,7 @@
#define VIA_MMIO_REGBASE 0x0
#define VIA_MMIO_VGABASE 0x8000
#define VIA_MMIO_BLTBASE 0x200000
-#define VIA_MMIO_BLTSIZE 0x10000
+#define VIA_MMIO_BLTSIZE 0x20000
/* defines for VIA 2D registers */
diff --git a/src/via_swov.c b/src/via_swov.c
index b207f3226fc0..4106c026dbb1 100644
--- a/src/via_swov.c
+++ b/src/via_swov.c
@@ -89,13 +89,12 @@ viaWaitHQVFlip(VIAPtr pVia)
unsigned long proReg = 0;
CARD32 volatile *pdwState;
- if ((pVia->ChipId == PCI_CHIP_VT3259) &&
- !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
+ if (pVia->ChipId == PCI_CHIP_VT3259 && !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
proReg = PRO_HQV1_OFFSET;
pdwState = (CARD32 volatile *)(pVia->VidMapBase + (HQV_CONTROL + proReg));
- if (pVia->ChipId == PCI_CHIP_VT3259) {
+ if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
while (*pdwState & (HQV_SUBPIC_FLIP | HQV_SW_FLIP)) ;
} else {
while (!(*pdwState & HQV_FLIP_STATUS)) ;
@@ -126,8 +125,7 @@ viaWaitHQVDone(VIAPtr pVia)
CARD32 volatile *pdwState;
unsigned long proReg = 0;
- if ((pVia->ChipId == PCI_CHIP_VT3259) &&
- !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
+ if (pVia->ChipId == PCI_CHIP_VT3259 && !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
proReg = PRO_HQV1_OFFSET;
pdwState = (CARD32 volatile *)(pVia->VidMapBase + (HQV_CONTROL + proReg));
@@ -214,12 +212,14 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
HWDiff->dwSupportTwoColorKey = VID_HWDIFF_FALSE;
HWDiff->dwHQVInitPatch = VID_HWDIFF_TRUE;
HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
+ HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
} else {
HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
HWDiff->dwSupportTwoColorKey = VID_HWDIFF_TRUE;
HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
+ HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
}
break;
case VIA_KM400:
@@ -228,6 +228,7 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
HWDiff->dwSupportTwoColorKey = VID_HWDIFF_FALSE;
HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
+ HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
break;
case VIA_K8M800:
HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
@@ -235,6 +236,7 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
HWDiff->dwSupportTwoColorKey = VID_HWDIFF_FALSE;
HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
+ HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
break;
case VIA_PM800:
HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
@@ -242,14 +244,41 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
HWDiff->dwSupportTwoColorKey = VID_HWDIFF_TRUE;
HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
+ HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
break;
case VIA_VM800:
+ case VIA_P4M900:
HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
HWDiff->dwSupportTwoColorKey = VID_HWDIFF_FALSE;
HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
+ HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
break;
+ case VIA_K8M890:
+ HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
+ HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
+ HWDiff->dwSupportTwoColorKey = VID_HWDIFF_FALSE;
+ HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
+ HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
+ HWDiff->dwNeedV1Prefetch = VID_HWDIFF_TRUE;
+ break;
+ case VIA_P4M890:
+ HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
+ HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
+ HWDiff->dwSupportTwoColorKey = VID_HWDIFF_FALSE;
+ HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
+ HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
+ HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
+ break;
+ case VIA_CX700:
+ HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
+ HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
+ HWDiff->dwSupportTwoColorKey = VID_HWDIFF_TRUE;
+ HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
+ HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
+ HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
+ break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"VIAVidHWDiffInit: Unhandled ChipSet.\n");
@@ -739,6 +768,10 @@ viaCalculateVideoColor(VIAPtr pVia, int hue, int saturation, int brightness,
case PCI_CHIP_VT3204:
case PCI_CHIP_VT3259:
case PCI_CHIP_VT3314:
+ case PCI_CHIP_VT3336:
+ case PCI_CHIP_VT3364:
+ case PCI_CHIP_VT3324:
+ case PCI_CHIP_VT3327:
model = 0;
break;
case PCI_CHIP_CLE3122:
@@ -872,6 +905,10 @@ viaSetColorSpace(VIAPtr pVia, int hue, int saturation, int brightness,
DBG_DD(ErrorF("000002C4 %08lx\n", col1));
DBG_DD(ErrorF("000002C8 %08lx\n", col2));
break;
+ case PCI_CHIP_VT3327:
+ case PCI_CHIP_VT3336:
+ case PCI_CHIP_VT3324:
+ case PCI_CHIP_VT3364:
case PCI_CHIP_CLE3122:
VIDOutD(V1_ColorSpaceReg_2, col2);
VIDOutD(V1_ColorSpaceReg_1, col1);
@@ -896,6 +933,12 @@ ViaInitVideoStatusFlag(VIAPtr pVia)
case PCI_CHIP_VT3259:
case PCI_CHIP_VT3314:
return VIDEO_HQV_INUSE | SW_USE_HQV | VIDEO_3_INUSE;
+ case PCI_CHIP_VT3327:
+ case PCI_CHIP_VT3336:
+ case PCI_CHIP_VT3324:
+ case PCI_CHIP_VT3364:
+ return VIDEO_HQV_INUSE | SW_USE_HQV | VIDEO_1_INUSE | \
+ VIDEO_ACTIVE | VIDEO_SHOW;
case PCI_CHIP_CLE3122:
return VIDEO_HQV_INUSE | SW_USE_HQV | VIDEO_1_INUSE;
default:
@@ -927,14 +970,17 @@ ViaSetVidCtl(VIAPtr pVia, unsigned int videoFlag)
case PCI_CHIP_VT3259:
case PCI_CHIP_VT3314:
return V3_ENABLE | V3_EXPIRE_NUM_3205;
-
+ case PCI_CHIP_VT3327:
+ case PCI_CHIP_VT3336:
+ case PCI_CHIP_VT3324:
+ case PCI_CHIP_VT3364:
+ return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3336;
case PCI_CHIP_CLE3122:
if (CLE266_REV_IS_CX(pVia->ChipRev))
return V3_ENABLE | V3_EXPIRE_NUM_F;
else
return V3_ENABLE | V3_EXPIRE_NUM;
break;
-
default:
DBG_DD(ErrorF("Unknown DeviceID\n"));
break;
@@ -976,8 +1022,7 @@ AddHQVSurface(ScrnInfoPtr pScrn, unsigned int numbuf, CARD32 fourcc)
{ HQV_DST_STARTADDR0, HQV_DST_STARTADDR1, HQV_DST_STARTADDR2 };
unsigned long proReg = 0;
- if ((pVia->ChipId == PCI_CHIP_VT3259) &&
- !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
+ if (pVia->ChipId == PCI_CHIP_VT3259 && !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
proReg = PRO_HQV1_OFFSET;
isplanar = ((fourcc == FOURCC_YV12) || (fourcc == FOURCC_XVMC));
@@ -1205,7 +1250,7 @@ SetFIFO_V1(VIAPtr pVia, CARD8 depth, CARD8 prethreshold, CARD8 threshold)
static void
SetFIFO_V3(VIAPtr pVia, CARD8 depth, CARD8 prethreshold, CARD8 threshold)
{
- if (pVia->ChipId == PCI_CHIP_VT3314) {
+ if ((pVia->ChipId == PCI_CHIP_VT3314) || (pVia->ChipId == PCI_CHIP_VT3324) || (pVia->ChipId == PCI_CHIP_VT3327)) {
SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL,
(VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) |
((depth - 1) & 0xff) | ((threshold & 0xff) << 8));
@@ -1263,6 +1308,12 @@ static void
SetFIFO_V3_64or32or32(VIAPtr pVia)
{
switch (pVia->ChipId) {
+ case PCI_CHIP_VT3327:
+ case PCI_CHIP_VT3336:
+ case PCI_CHIP_VT3324:
+ case PCI_CHIP_VT3364:
+ SetFIFO_V3(pVia, 225, 200, 250);
+ break;
case PCI_CHIP_VT3204:
SetFIFO_V3(pVia, 100, 89, 89);
break;
@@ -1273,14 +1324,12 @@ SetFIFO_V3_64or32or32(VIAPtr pVia)
case PCI_CHIP_VT3259:
SetFIFO_V3(pVia, 32, 29, 29);
break;
-
case PCI_CHIP_CLE3122:
if (CLE266_REV_IS_CX(pVia->ChipRev))
SetFIFO_V3(pVia, 64, 56, 56);
else
SetFIFO_V3(pVia, 32, 16, 16);
break;
-
default:
break;
}
@@ -1290,6 +1339,12 @@ static void
SetFIFO_V3_64or32or16(VIAPtr pVia)
{
switch (pVia->ChipId) {
+ case PCI_CHIP_VT3327:
+ case PCI_CHIP_VT3336:
+ case PCI_CHIP_VT3324:
+ case PCI_CHIP_VT3364:
+ SetFIFO_V3(pVia, 225, 200, 250);
+ break;
case PCI_CHIP_VT3204:
SetFIFO_V3(pVia, 100, 89, 89);
break;
@@ -1391,7 +1446,7 @@ SetColorKey(VIAPtr pVia, unsigned long videoFlag,
CARD32 keyLow, CARD32 keyHigh, CARD32 compose)
{
keyLow &= 0x00FFFFFF;
- if (pVia->ChipId == PCI_CHIP_VT3259)
+ if (pVia->VideoEngine == VIDEO_ENGINE_CME)
keyLow |= 0x40000000;
/*SaveVideoRegister(pVia, V_COLOR_KEY, keyLow); */
@@ -1423,7 +1478,7 @@ SetChromaKey(VIAPtr pVia, unsigned long videoFlag,
chromaLow |= (VIDInD(V_CHROMAKEY_LOW) & ~CHROMA_KEY_LOW);
chromaHigh |= (VIDInD(V_CHROMAKEY_HIGH) & ~CHROMA_KEY_HIGH);
- if (pVia->ChipId == PCI_CHIP_VT3259)
+ if (pVia->VideoEngine == VIDEO_ENGINE_CME)
chromaLow |= 0x40000000;
SaveVideoRegister(pVia, V_CHROMAKEY_HIGH, chromaHigh);
@@ -1465,8 +1520,7 @@ SetHQVFetch(VIAPtr pVia, CARD32 srcFetch, unsigned long srcHeight)
{
unsigned long proReg = 0;
- if ((pVia->ChipId == PCI_CHIP_VT3259) &&
- !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
+ if (pVia->ChipId == PCI_CHIP_VT3259 && !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
proReg = PRO_HQV1_OFFSET;
if (!pVia->HWDiff.dwHQVFetchByteUnit) { /* CLE_C0 */
@@ -1632,7 +1686,9 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
unsigned long dwOffset = 0, fetch = 0, tmp = 0;
unsigned long proReg = 0;
- if ((pVia->ChipId == PCI_CHIP_VT3259) && !(videoFlag & VIDEO_1_INUSE))
+ DBG_DD(ErrorF("videoflag=%p\n",videoFlag));
+
+ if (pVia->ChipId == PCI_CHIP_VT3259 && !(videoFlag & VIDEO_1_INUSE))
proReg = PRO_HQV1_OFFSET;
compose = (VIDInD(V_COMPOSE_MODE) &
@@ -1657,6 +1713,12 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
DBG_DD(ErrorF("===srcHeight= %ld \n", srcHeight));
vidCtl = ViaSetVidCtl(pVia, videoFlag);
+
+ if(hwDiff->dwNeedV1Prefetch) {
+ DBG_DD(ErrorF("NEEDV1PREFETCH\n"));
+ vidCtl |= V1_PREFETCH_ON_3336;
+ }
+
viaOverlayGetV1V3Format(pVia, (videoFlag & VIDEO_1_INUSE) ? 1 : 3,
videoFlag, &vidCtl, &hqvCtl);
@@ -1688,7 +1750,7 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
pVia->swov.overlayRecordV1.dwOffset,
pVia->swov.overlayRecordV1.dwUVoffset,
srcPitch, oriSrcHeight);
- if (pVia->ChipId == PCI_CHIP_VT3259) {
+ if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
SaveVideoRegister(pVia, HQV_SRC_STARTADDR_Y + proReg,
YCbCr.dwY);
SaveVideoRegister(pVia, HQV_SRC_STARTADDR_U + proReg,
@@ -1726,7 +1788,7 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
pVia->swov.overlayRecordV1.dwHQVAddr[1] + hqvOffset,
pVia->swov.overlayRecordV1.dwHQVAddr[2] + hqvOffset);
- if (pVia->ChipId == PCI_CHIP_VT3259)
+ if (pVia->VideoEngine == VIDEO_ENGINE_CME)
SaveVideoRegister(pVia, 0x1cc + proReg, dwOffset);
SaveVideoRegister(pVia, HQV_SRC_STARTADDR_Y + proReg, startAddr);
} else {
@@ -1865,6 +1927,12 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
if (haveHQVzoomV) {
miniCtl |= V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY;
+ if (srcWidth >= 800 &&
+ (pVia->ChipId == PCI_CHIP_VT3327 || pVia->ChipId == PCI_CHIP_VT3336 ||
+ pVia->ChipId == PCI_CHIP_VT3324 || pVia->ChipId == PCI_CHIP_VT3364 ||
+ pVia->ChipId == PCI_CHIP_VT3205)) {
+ miniCtl &= ~V1_Y_INTERPOLY;
+ }
tmp |= zoomCtl & 0x0000ffff;
hqvFilterCtl &= 0xfffdffff;
}
@@ -1924,7 +1992,7 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
usleep(1);
}
- if (pVia->ChipId == PCI_CHIP_VT3259)
+ if (pVia->VideoEngine == VIDEO_ENGINE_CME)
hqvCtl |= HQV_GEN_IRQ;
VIDOutD(HQV_CONTROL + proReg, hqvCtl & ~HQV_SW_FLIP);
@@ -1933,7 +2001,7 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
DBG_DD(ErrorF("HQV control wf5 - %08lx\n", *HQVCtrl));
DBG_DD(ErrorF(" Wait flips5"));
- if (pVia->ChipId != PCI_CHIP_VT3259) {
+ if (pVia->VideoEngine != VIDEO_ENGINE_CME) {
for (i = 0; (i < 50) && !(*HQVCtrl & HQV_FLIP_STATUS);
i++) {
DBG_DD(ErrorF(" HQV wait %d %08lx\n", i, *HQVCtrl));
@@ -2042,7 +2110,7 @@ VIAVidUpdateOverlay(ScrnInfoPtr pScrn, LPDDUPDATEOVERLAY pUpdate)
videoFlag = pVia->swov.gdwVideoFlagSW;
}
- if ((pVia->ChipId == PCI_CHIP_VT3259) && !(videoFlag & VIDEO_1_INUSE))
+ if (pVia->ChipId == PCI_CHIP_VT3259 && !(videoFlag & VIDEO_1_INUSE))
proReg = PRO_HQV1_OFFSET;
flags |= DDOVER_INTERLEAVED;
@@ -2170,7 +2238,7 @@ ViaOverlayHide(ScrnInfoPtr pScrn)
(pVia->swov.SrcFourCC == FOURCC_XVMC))
videoFlag = pVia->swov.gdwVideoFlagSW;
- if ((pVia->ChipId == PCI_CHIP_VT3259) && !(videoFlag & VIDEO_1_INUSE))
+ if (pVia->ChipId == PCI_CHIP_VT3259 && !(videoFlag & VIDEO_1_INUSE))
proReg = PRO_HQV1_OFFSET;
ResetVidRegBuffer(pVia);
diff --git a/src/via_swov.h b/src/via_swov.h
index 10569a18fd56..d93aa83d30d3 100644
--- a/src/via_swov.h
+++ b/src/via_swov.h
@@ -26,7 +26,7 @@
#ifndef _VIA_SWOV_H_
#define _VIA_SWOV_H_ 1
- /* #define XV_DEBUG 1 *//* write log msg to /var/log/XFree86.0.log */
+/*#define XV_DEBUG 1 write log msg to /var/log/XFree86.0.log */
#ifdef XV_DEBUG
# define DBG_DD(x) (x)
@@ -60,6 +60,7 @@ typedef struct __VIAHWDiff
/*unsigned long dwUpdFlip; *//* Set HQV3D0[15] to flip video */
unsigned long dwHQVDisablePatch; /* Change Video Engine Clock setting for HQV disable bug */
/*unsigned long dwSUBFlip; *//* Set HQV3D0[15] to flip video for sub-picture blending */
+ unsigned long dwNeedV1Prefetch; /*V1 pre-fetch function for K8*/
/*unsigned long dwNeedV3Prefetch; *//* V3 pre-fetch function for K8 */
/*unsigned long dwNeedV4Prefetch; *//* V4 pre-fetch function for K8 */
/*unsigned long dwUseSystemMemory; *//* Use system memory for DXVA compressed data buffers */
diff --git a/src/via_vbe.c b/src/via_vbe.c
index 70fddfb08ca8..f50186ddb981 100644
--- a/src/via_vbe.c
+++ b/src/via_vbe.c
@@ -120,6 +120,7 @@ ViaVbeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
VIAPtr pVia;
VbeModeInfoData *data;
int mode;
+ int refreshRate;
pVia = VIAPTR(pScrn);
@@ -132,11 +133,22 @@ ViaVbeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
/* enable linear addressing */
mode |= 1 << 14;
+ if (data->block) {
+ refreshRate = data->block->RefreshRate ;
+ } else {
+ refreshRate = 6000 ;
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "Unable to determine the refresh rate, using %.2f. "
+ "Please check your configuration.\n", refreshRate/100. ) ;
+ }
+
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Trying VBE Mode %dx%d (0x%x) Refresh %.2f:\n",
(int) data->data->XResolution,
(int) data->data->YResolution,
- mode & ~(1 << 11), (float) data->block->RefreshRate/100.);
- ViaVbeSetRefresh(pScrn, data->block->RefreshRate/100);
+ mode & ~(1 << 11), (float) refreshRate/100.);
+
+ ViaVbeSetRefresh(pScrn, refreshRate/100);
+
if (VBESetVBEMode(pVia->pVbe, mode, data->block) == FALSE) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VBESetVBEMode failed");
if ((data->block || (data->mode & (1 << 11))) &&
diff --git a/src/via_video.c b/src/via_video.c
index 62b8a888523a..3a09ba1d40e9 100644
--- a/src/via_video.c
+++ b/src/via_video.c
@@ -278,7 +278,11 @@ DecideOverlaySupport(ScrnInfoPtr pScrn)
if (pVia->ChipId != PCI_CHIP_VT3205 &&
pVia->ChipId != PCI_CHIP_VT3204 &&
pVia->ChipId != PCI_CHIP_VT3259 &&
- pVia->ChipId != PCI_CHIP_VT3314) {
+ pVia->ChipId != PCI_CHIP_VT3314 &&
+ pVia->ChipId != PCI_CHIP_VT3327 &&
+ pVia->ChipId != PCI_CHIP_VT3336 &&
+ pVia->ChipId != PCI_CHIP_VT3364 &&
+ pVia->ChipId != PCI_CHIP_VT3324) {
CARD32 bandwidth = (mode->HDisplay >> 4) * (mode->VDisplay >> 5) *
pScrn->bitsPerPixel * mode->VRefresh;
@@ -555,7 +559,12 @@ viaInitVideo(ScreenPtr pScreen)
((pVia->Chipset == VIA_CLE266) ||
(pVia->Chipset == VIA_KM400) ||
(pVia->Chipset == VIA_K8M800) ||
- (pVia->Chipset == VIA_PM800) || (pVia->Chipset == VIA_VM800));
+ (pVia->Chipset == VIA_PM800) ||
+ (pVia->Chipset == VIA_VM800) ||
+ (pVia->Chipset == VIA_K8M890) ||
+ (pVia->Chipset == VIA_P4M900) ||
+ (pVia->Chipset == VIA_CX700) ||
+ (pVia->Chipset == VIA_P4M890));
if ((pVia->drmVerMajor < 2) ||
((pVia->drmVerMajor == 2) && (pVia->drmVerMinor < 9)))
pVia->useDmaBlit = FALSE;
@@ -571,7 +580,9 @@ viaInitVideo(ScreenPtr pScreen)
if ((pVia->Chipset == VIA_CLE266) || (pVia->Chipset == VIA_KM400) ||
(pVia->Chipset == VIA_K8M800) || (pVia->Chipset == VIA_PM800) ||
- (pVia->Chipset == VIA_VM800)) {
+ (pVia->Chipset == VIA_VM800) || (pVia->Chipset == VIA_K8M890) ||
+ (pVia->Chipset == VIA_P4M900) || (pVia->Chipset == VIA_CX700) ||
+ (pVia->Chipset == VIA_P4M890)) {
num_new = viaSetupAdaptors(pScreen, &newAdaptors);
num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
} else {
@@ -1055,8 +1066,7 @@ Flip(VIAPtr pVia, viaPortPrivPtr pPriv, int fourcc,
{
unsigned long proReg = 0;
- if ((pVia->ChipId == PCI_CHIP_VT3259) &&
- !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
+ if (pVia->ChipId == PCI_CHIP_VT3259 && !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
proReg = PRO_HQV1_OFFSET;
switch (fourcc) {
@@ -1078,7 +1088,7 @@ Flip(VIAPtr pVia, viaPortPrivPtr pPriv, int fourcc,
while ((VIDInD(HQV_CONTROL + proReg) & HQV_SW_FLIP)) ;
VIDOutD(HQV_SRC_STARTADDR_Y + proReg,
pVia->swov.SWDevice.dwSWPhysicalAddr[DisplayBufferIndex]);
- if (pVia->ChipId == PCI_CHIP_VT3259) {
+ if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
VIDOutD(HQV_SRC_STARTADDR_U + proReg,
pVia->swov.SWDevice.dwSWCrPhysicalAddr[DisplayBufferIndex]);
} else {
@@ -1132,8 +1142,8 @@ viaDmaBlitImage(VIAPtr pVia,
Bool nv12Conversion;
bounceBuffer = ((unsigned long)src & 15);
- nv12Conversion = ((pVia->ChipId == PCI_CHIP_VT3259)
- && (id == FOURCC_YV12));
+ nv12Conversion = (pVia->VideoEngine == VIDEO_ENGINE_CME &&
+ id == FOURCC_YV12);
switch (id) {
case FOURCC_YUY2:
@@ -1325,7 +1335,7 @@ viaPutImage(ScrnInfoPtr pScrn,
} else {
switch (id) {
case FOURCC_YV12:
- if (pVia->ChipId == PCI_CHIP_VT3259) {
+ if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
nv12cp(pVia->swov.SWDevice.
lpSWOverlaySurface[pVia->dwFrameNum & 1], buf,
dstPitch, width, height, 0);
diff --git a/src/via_video.h b/src/via_video.h
index 6ca7da141527..47a4d24fb8ff 100644
--- a/src/via_video.h
+++ b/src/via_video.h
@@ -29,7 +29,7 @@
* I N C L U D E S
*/
- /*#define XV_DEBUG 1*//* write log msg to /var/log/XFree86.0.log */
+/*#define XV_DEBUG 1 write log msg to /var/log/XFree86.0.log */
#define COLOR_KEY 1 /* set color key value from driver layer */
#define HW_3123
diff --git a/src/via_xvmc.c b/src/via_xvmc.c
index fa390d11884d..768426c47ae2 100644
--- a/src/via_xvmc.c
+++ b/src/via_xvmc.c
@@ -330,7 +330,9 @@ ViaInitXVMC(ScreenPtr pScreen)
pVia->XvMCEnabled = 0;
if (!(pVia->Chipset == VIA_CLE266) && !(pVia->Chipset == VIA_K8M800) &&
- !(pVia->Chipset == VIA_PM800) && !(pVia->Chipset == VIA_VM800)) {
+ !(pVia->Chipset == VIA_PM800) && !(pVia->Chipset == VIA_VM800) &&
+ !(pVia->Chipset == VIA_K8M890) && !(pVia->Chipset == VIA_P4M900) &&
+ !(pVia->Chipset == VIA_P4M890)) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"[XvMC] Not supported on this chipset.\n");
return;