diff options
| author | Andy Lutomirski <luto@amacapital.net> | 2013-05-13 23:58:43 +0000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2013-05-31 13:37:31 +1000 |
| commit | f435046d38af631920b299455db9e95dfc06d055 (patch) | |
| tree | 34ed84a701acbb024af166e553743901f0b29cc1 /drivers/gpu/drm/drm_vm.c | |
| parent | ff47eaf24d01b5753e4964b10c606e0d711b143e (diff) | |
drm, agpgart: Use pgprot_writecombine for AGP maps and make the MTRR optional
I'm not sure I understand the intent of the previous behavior. mmap
on /dev/agpgart and DRM_AGP maps had no cache flags set, so they
would be fully cacheable. But the DRM code (most of the time) would
add a write-combining MTRR that would change the effective memory
type to WC.
The new behavior just requests WC explicitly for all AGP maps.
If there is any code out there that expects cacheable access to the
AGP aperture (because the drm driver doesn't request an MTRR or
because it's using /dev/agpgart directly), then it will now end up
with a UC or WC mapping, depending on the architecture and PAT
availability. But cacheable access to the aperture seems like it's
asking for trouble, because, AIUI, the aperture is an alias of RAM.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/drm_vm.c')
| -rw-r--r-- | drivers/gpu/drm/drm_vm.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c index 43e7825d3717..1575694ccaca 100644 --- a/drivers/gpu/drm/drm_vm.c +++ b/drivers/gpu/drm/drm_vm.c @@ -49,13 +49,10 @@ static pgprot_t drm_io_prot(struct drm_local_map *map, pgprot_t tmp = vm_get_page_prot(vma->vm_flags); #if defined(__i386__) || defined(__x86_64__) - if (map->type != _DRM_AGP) { - if (map->type == _DRM_FRAME_BUFFER || - map->flags & _DRM_WRITE_COMBINING) - tmp = pgprot_writecombine(tmp); - else - tmp = pgprot_noncached(tmp); - } + if (map->type == _DRM_REGISTERS && !(map->flags & _DRM_WRITE_COMBINING)) + tmp = pgprot_noncached(tmp); + else + tmp = pgprot_writecombine(tmp); #elif defined(__powerpc__) pgprot_val(tmp) |= _PAGE_NO_CACHE; if (map->type == _DRM_REGISTERS) |