summaryrefslogtreecommitdiff
path: root/include/pci_ids/i965_pci_ids.h
blob: d37a2eed4b09a15c417516e2fe3c47f965544aa0 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
CHIPSET(0x29A2, I965_G, i965)
CHIPSET(0x2992, I965_Q, i965)
CHIPSET(0x2982, I965_G_1, i965)
CHIPSET(0x2972, I946_GZ, i965)
CHIPSET(0x2A02, I965_GM, i965)
CHIPSET(0x2A12, I965_GME, i965)
CHIPSET(0x2A42, GM45_GM, g4x)
CHIPSET(0x2E02, IGD_E_G, g4x)
CHIPSET(0x2E12, Q45_G, g4x)
CHIPSET(0x2E22, G45_G, g4x)
CHIPSET(0x2E32, G41_G, g4x)
CHIPSET(0x2E42, B43_G, g4x)
CHIPSET(0x2E92, B43_G1, g4x)
CHIPSET(0x0042, ILD_G, ilk)
CHIPSET(0x0046, ILM_G, ilk)
CHIPSET(0x0102, SANDYBRIDGE_GT1, snb_gt1)
CHIPSET(0x0112, SANDYBRIDGE_GT2, snb_gt2)
CHIPSET(0x0122, SANDYBRIDGE_GT2_PLUS, snb_gt2)
CHIPSET(0x0106, SANDYBRIDGE_M_GT1, snb_gt1)
CHIPSET(0x0116, SANDYBRIDGE_M_GT2, snb_gt2)
CHIPSET(0x0126, SANDYBRIDGE_M_GT2_PLUS, snb_gt2)
CHIPSET(0x010A, SANDYBRIDGE_S, snb_gt1)
CHIPSET(0x0152, IVYBRIDGE_GT1, ivb_gt1)
CHIPSET(0x0162, IVYBRIDGE_GT2, ivb_gt2)
CHIPSET(0x0156, IVYBRIDGE_M_GT1, ivb_gt1)
CHIPSET(0x0166, IVYBRIDGE_M_GT2, ivb_gt2)
CHIPSET(0x015a, IVYBRIDGE_S_GT1, ivb_gt1)