From d5d9984c2be3c70c15a964e05ccb7e4bb6f0162a Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Wed, 14 May 2014 11:15:26 -0400 Subject: freedreno/a3xx: fix MAX_INPUTS shader cap Hardware only supports 16. Which fd3_shader_variant properly reflected, but the pipe cap did not, leading to array overflow (and shaders that could not possibly work). Also a bunch of asserts to make problems like this easier to see. Signed-off-by: Rob Clark --- src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c') diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c b/src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c index ddb69243c11..0f7044b56f1 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c @@ -1324,6 +1324,8 @@ decl_in(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl) DBG("decl in -> r%d", i + base); // XXX + compile_assert(ctx, n < ARRAY_SIZE(so->inputs)); + so->inputs[n].semantic = decl_semantic(&decl->Semantic); so->inputs[n].compmask = (1 << ncomp) - 1; so->inputs[n].ncomp = ncomp; @@ -1410,6 +1412,7 @@ decl_out(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl) for (i = decl->Range.First; i <= decl->Range.Last; i++) { unsigned n = so->outputs_count++; + compile_assert(ctx, n < ARRAY_SIZE(so->outputs)); so->outputs[n].semantic = decl_semantic(&decl->Semantic); so->outputs[n].regid = regid(i + base, comp); } -- cgit v1.2.3