From d4662e38c445a4e8595096781c577e5b5a606017 Mon Sep 17 00:00:00 2001 From: Daniel Schürmann Date: Fri, 4 Jun 2021 14:48:19 +0200 Subject: aco: simplify Phi RegClass selection Also adds moves validation rules to aco_validate. Reviewed-by: Rhys Perry Part-of: --- .../compiler/aco_instruction_selection_setup.cpp | 27 +++++----------------- src/amd/compiler/aco_validate.cpp | 6 ++++- 2 files changed, 11 insertions(+), 22 deletions(-) (limited to 'src/amd/compiler') diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp index 00fc21d8b76..bdfac594cbb 100644 --- a/src/amd/compiler/aco_instruction_selection_setup.cpp +++ b/src/amd/compiler/aco_instruction_selection_setup.cpp @@ -520,8 +520,6 @@ setup_nir(isel_context *ctx, nir_shader *nir) void init_context(isel_context *ctx, nir_shader *shader) { nir_function_impl *impl = nir_shader_get_entrypoint(shader); - unsigned lane_mask_size = ctx->program->lane_mask.size(); - ctx->shader = shader; /* Init NIR range analysis. */ @@ -936,36 +934,23 @@ void init_context(isel_context *ctx, nir_shader *shader) } case nir_instr_type_phi: { nir_phi_instr* phi = nir_instr_as_phi(instr); - RegType type; - unsigned size = phi->dest.ssa.num_components; - - if (phi->dest.ssa.bit_size == 1) { - assert(size == 1 && "multiple components not yet supported on boolean phis."); - type = RegType::sgpr; - size *= lane_mask_size; - regclasses[phi->dest.ssa.index] = RegClass(type, size); - break; - } + RegType type = RegType::sgpr; + unsigned num_components = phi->dest.ssa.num_components; + assert((phi->dest.ssa.bit_size != 1 || num_components == 1) && + "Multiple components not supported on boolean phis."); if (nir_dest_is_divergent(phi->dest)) { type = RegType::vgpr; } else { - type = RegType::sgpr; nir_foreach_phi_src (src, phi) { if (regclasses[src->src.ssa->index].type() == RegType::vgpr) type = RegType::vgpr; - if (regclasses[src->src.ssa->index].type() == RegType::none) - done = false; } } - RegClass rc = get_reg_class(ctx, type, phi->dest.ssa.num_components, phi->dest.ssa.bit_size); - if (rc != regclasses[phi->dest.ssa.index]) { + RegClass rc = get_reg_class(ctx, type, num_components, phi->dest.ssa.bit_size); + if (rc != regclasses[phi->dest.ssa.index]) done = false; - } else { - nir_foreach_phi_src(src, phi) - assert(regclasses[src->src.ssa->index].size() == rc.size()); - } regclasses[phi->dest.ssa.index] = rc; break; } diff --git a/src/amd/compiler/aco_validate.cpp b/src/amd/compiler/aco_validate.cpp index 1bcd6c4f017..f5ba8ab4958 100644 --- a/src/amd/compiler/aco_validate.cpp +++ b/src/amd/compiler/aco_validate.cpp @@ -368,9 +368,13 @@ bool validate_ir(Program* program) } else if (instr->opcode == aco_opcode::p_phi) { check(instr->operands.size() == block.logical_preds.size(), "Number of Operands does not match number of predecessors", instr.get()); check(instr->definitions[0].getTemp().type() == RegType::vgpr, "Logical Phi Definition must be vgpr", instr.get()); - } else if (instr->opcode == aco_opcode::p_linear_phi) { for (const Operand& op : instr->operands) + check(instr->definitions[0].size() == op.size(), "Operand sizes must match Definition size", instr.get()); + } else if (instr->opcode == aco_opcode::p_linear_phi) { + for (const Operand& op : instr->operands) { check(!op.isTemp() || op.getTemp().is_linear(), "Wrong Operand type", instr.get()); + check(instr->definitions[0].size() == op.size(), "Operand sizes must match Definition size", instr.get()); + } check(instr->operands.size() == block.linear_preds.size(), "Number of Operands does not match number of predecessors", instr.get()); } break; -- cgit v1.2.3