From 4cfdd425b65411a3a558748b4c2041783e95aa18 Mon Sep 17 00:00:00 2001 From: Jose Maria Casanova Crespo Date: Thu, 15 Oct 2020 13:22:28 +0200 Subject: vc4: Add missing load_ubo set_align in yuv_blit fs. Fixes: e78a7a18252 ("nir: Assert memory loads are aligned") Reviewed-by: Eric Anholt Tested-by: Piotr Oniszczuk Part-of: --- src/gallium/drivers/vc4/vc4_blit.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/vc4/vc4_blit.c b/src/gallium/drivers/vc4/vc4_blit.c index 4e4c4898ea8..e72e5dc12ba 100644 --- a/src/gallium/drivers/vc4/vc4_blit.c +++ b/src/gallium/drivers/vc4/vc4_blit.c @@ -299,6 +299,7 @@ static void *vc4_get_yuv_fs(struct pipe_context *pctx, int cpp) nir_ssa_dest_init(&load->instr, &load->dest, load->num_components, 32, NULL); load->src[0] = nir_src_for_ssa(one); load->src[1] = nir_src_for_ssa(nir_iadd(&b, x_offset, y_offset)); + nir_intrinsic_set_align(load, 4, 0); nir_builder_instr_insert(&b, &load->instr); nir_store_var(&b, color_out, -- cgit v1.2.3