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path: root/src/panfrost
AgeCommit message (Expand)AuthorFilesLines
2021-06-22panfrost: Add a Vulkan driver for Midgard/Bifrost GPUsBoris Brezillon23-0/+10700
2021-06-22pan/midg: Add a flag to dump internal shadersBoris Brezillon2-2/+6
2021-06-22panfrost: Make panfrost_scoreboard_initialize_tiler() return the job pointerBoris Brezillon2-12/+14
2021-06-22panfrost: Constify the constants pointers passed to pan_blend functionsBoris Brezillon2-3/+3
2021-06-21nir,panfrost: Suffix fsat_signed and fclamp_pos with _maliJason Ekstrand4-15/+15
2021-06-17pan/mdg: Fix reading a spilt register in the bundle it's writtenIcecream951-1/+29
2021-06-17pan/mdg: Fill from TLS before spilling non-SSA nodesIcecream951-1/+15
2021-06-17pan/mdg: Reorder some code in mir_spill_registerIcecream951-16/+17
2021-06-17pan/mdg: Add a bundle ID to instructionsIcecream952-0/+6
2021-06-15pan/bi: Fuse abs into FCMP/FMIN/FMAX.v2f16Alyssa Rosenzweig1-4/+4
2021-06-15pan/bi: Schedule FCMP.v2f16 with abs modifierAlyssa Rosenzweig1-0/+4
2021-06-15pan/bi: Fuse fclamp_pos and fsat_signedAlyssa Rosenzweig1-0/+5
2021-06-15pan/bi: Add back custom algebraic optsAlyssa Rosenzweig4-1/+99
2021-06-15pan/bi: Propagate fabs/neg/satAlyssa Rosenzweig4-0/+242
2021-06-15pan/bi: Report tuples, not nops, in shader-dbAlyssa Rosenzweig1-5/+2
2021-06-15pan/bi: Handle fsat_signed and fclamp_posAlyssa Rosenzweig1-0/+12
2021-06-15pan/bi: Track instruction size in opcode tableAlyssa Rosenzweig2-4/+18
2021-06-15pan/bi: Move typesize to common codeAlyssa Rosenzweig2-14/+15
2021-06-15pan/bi: Move bi_word_node to common codeAlyssa Rosenzweig2-7/+6
2021-06-15pan/bi: Include modifier info in opcode tableAlyssa Rosenzweig2-1/+18
2021-06-10pan/decode: Handle cache flush jobsAlyssa Rosenzweig1-0/+14
2021-06-10pan/decode: Fix image attribute countingAlyssa Rosenzweig1-14/+15
2021-06-10panfrost: Add "Cache Flush" job XMLAlyssa Rosenzweig1-0/+17
2021-06-10panfrost: Clean up vertex/instance ID on MidgardAlyssa Rosenzweig1-23/+8
2021-06-10panfrost: Add XML for vertex/instance ID recordsAlyssa Rosenzweig1-0/+15
2021-06-10panfrost: Remove pan_image_stateAlyssa Rosenzweig1-9/+0
2021-06-10panfrost: Make data_valid a bitsetAlyssa Rosenzweig1-6/+2
2021-06-10panfrost: Don't clobber indirect dispatch fieldsAlyssa Rosenzweig5-10/+16
2021-06-10pan/indirect_dispatch: Use extracted valuesAlyssa Rosenzweig1-3/+3
2021-06-10pan/indirect_dispatch: Expand split expressionsAlyssa Rosenzweig1-12/+4
2021-06-10pan/indirect_dispatch: Distinguish minus-1 defsAlyssa Rosenzweig1-13/+12
2021-06-10pan/indirect_dispatch: Simplify empty command caseAlyssa Rosenzweig1-5/+3
2021-06-10pan/indirect_dispatch: Indent NIR blocksAlyssa Rosenzweig1-44/+53
2021-06-10panfrost: Reduce pan_image_state indirectionAlyssa Rosenzweig3-13/+9
2021-06-10panfrost: Don't CRC mipmapped texturesAlyssa Rosenzweig3-16/+11
2021-06-10panfrost: Add some missing BGRA formatsAlyssa Rosenzweig1-0/+6
2021-06-10pan/mdg: Insert moves to load/store registersAlyssa Rosenzweig1-0/+27
2021-06-10pan/mdg: Assert scheduled instructions are reasonableAlyssa Rosenzweig1-0/+4
2021-06-10pan/mdg: Don't skip unit-based checks in choose_instructionAlyssa Rosenzweig1-13/+16
2021-06-10pan/mdg: Use more accurate ld/st reg estimatesAlyssa Rosenzweig1-5/+13
2021-06-10pan/mdg: Lower away gl_VertexID offsetAlyssa Rosenzweig3-3/+4
2021-06-10pan/mdg: Wire in PAN_SYSVAL_VERTEX_INSTANCE_OFFSETSAlyssa Rosenzweig1-0/+9
2021-06-10panfrost: Mark 16/32_UNORM as non-renderable (v5)Alyssa Rosenzweig1-11/+11
2021-06-10pan/mdg: Fix incorrect rewrite in Midgard schedulerAlyssa Rosenzweig1-1/+3
2021-06-10pan/mdg: Update r1.w commentAlyssa Rosenzweig1-6/+3
2021-06-10pan/mdg: Handle {i,u}{add,sub}_satAlyssa Rosenzweig1-0/+4
2021-06-10pan/mdg: Fix units for SUBSATAlyssa Rosenzweig1-2/+2
2021-06-10panfrost: Respect early-Z force on MidgardAlyssa Rosenzweig1-0/+4
2021-06-10pan/mdg: Stub memory_barrier{_image}Alyssa Rosenzweig1-0/+3
2021-06-10pan/mdg: Make -Wswitch happyAlyssa Rosenzweig1-0/+3
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