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3 dayspan/mdg: prevent csel_v from being scheduled alongside writeoutItalo Nicola1-4/+7
Midgard writeout arguments need to be written to in the same bundle the writeout happens. Both csel, csel_v and their float variants also require their conditional to be performed on the same bundle. This patch prevents scheduling csel the same bundle as a writeout, fixing the scheduling issue. But... there's still room for optimizations since in some cases it might be possible to fit all these instructions in the same bundle. No shader-db changes. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9340>
14 dayspanfrost: Fix uniform_count on MidgardAlyssa Rosenzweig4-24/+14
The compiler ABI specifies push uniforms at a 4-byte granularity (like Bifrost), but Midgard require a 16-byte granularity. As such if the number of pushed words is not a multiple of 4, there is a buffer overrun at shader load time. Ordinarily this is inaccessible so the garbage is ignored. However, there was a great deal of confusion around the `uniform_cutoff` variable. In some cases (such a full glmark2 run on a 64-bit processor), the push uniforms would be at the end of a BO and the overrun would cause a page fault. Remove uniform_cutoff entirely and work with count directly to avoid faulting, and round the count up to be defensive. Closes: #4289 Fixes: ed810eb0a0c ("panfrost: Don't truncate uniform_count") Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Tested-by: Robin Murphy <robin.murphy@arm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9109>
2021-02-15panfrost: Move the shader compilation logic out of the gallium driverBoris Brezillon5-57/+38
While at it, rework the code to avoid copies between intermediate structures: the pan_shader_info is passed to the compiler context so the compiler can fill shader information directly. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8963>
2021-02-15panfrost: Keep the compiler inputs in the contextBoris Brezillon4-26/+19
So we don't have to copy data around. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8963>
2021-02-15panfrost: Move sysval_to_id out of panfrost_sysvalsBoris Brezillon2-2/+4
So we can re-use the panfrost_sysvals definition outside of the compiler without dragging the sysval_to_id hash table. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8963>
2021-02-12pan/{mdg, bi}: Lower load_sample_posAlyssa Rosenzweig1-0/+5
Conceptually same lowering as the DDK, although we're missing a number of relevant compiler optimizations so the generated code is awful. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
2021-02-12pan/{mdg, bi}: Lower load_helper_invocationAlyssa Rosenzweig1-0/+1
Passes dEQP-GLES31.functional.shaders.helper_invocation.* on both architectures Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
2021-02-12pan/mdg: Lower stores from helpersAlyssa Rosenzweig4-0/+96
Required for correct behaviour of SSBOs in fragment shaders on Midgard. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
2021-02-12pan/mdg: Stub load_barycentric_sampleAlyssa Rosenzweig1-1/+2
Now parity with Bifrost for not failing over these intrinsics. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
2021-02-12pan/mdg: Lower ufind_msb, poorlyAlyssa Rosenzweig1-0/+6
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
2021-02-12pan/mdg: Implement uclzAlyssa Rosenzweig1-0/+1
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
2021-02-12pan/mdg: Rename bitcount8 to popcnt, fixing the unitAlyssa Rosenzweig3-3/+3
Still doesn't seem to work correctly for negative values. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
2021-02-12pan/mdg: Lower bitfield instructionsAlyssa Rosenzweig1-0/+5
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
2021-02-12pan/mdg: Remove unused pack_unorm_4x8 loweringAlyssa Rosenzweig1-2/+0
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
2021-02-12pan/mdg: Assert on bad 64-bit swizzle in disassemblyAlyssa Rosenzweig1-1/+3
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
2021-02-12panfrost: Overhaul sysval handlingAlyssa Rosenzweig1-11/+5
Don't preassign. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
2021-02-11pan/mdg: Push uniforms based on UBO analysisAlyssa Rosenzweig5-23/+138
Skips over "holes" in UBO ranges and allows pushing things other than UBO #0 (GL uniforms) and sysvals. shader-db results relative to beginning of series (so includes the hurt from lowering UBO to uniforms): total instructions in shared programs: 96611 -> 95018 (-1.65%) instructions in affected programs: 22356 -> 20763 (-7.13%) helped: 204 HURT: 13 helped stats (abs) min: 1 max: 27 x̄: 8.18 x̃: 7 helped stats (rel) min: 0.42% max: 26.09% x̄: 8.60% x̃: 8.07% HURT stats (abs) min: 1 max: 33 x̄: 5.77 x̃: 2 HURT stats (rel) min: 0.47% max: 15.64% x̄: 3.56% x̃: 1.72% 95% mean confidence interval for instructions value: -8.29 -6.39 95% mean confidence interval for instructions %-change: -8.74% -7.00% Instructions are helped. total bundles in shared programs: 44886 -> 44790 (-0.21%) bundles in affected programs: 9640 -> 9544 (-1.00%) helped: 131 HURT: 70 helped stats (abs) min: 1 max: 11 x̄: 4.34 x̃: 4 helped stats (rel) min: 1.04% max: 42.31% x̄: 10.39% x̃: 9.84% HURT stats (abs) min: 1 max: 16 x̄: 6.76 x̃: 6 HURT stats (rel) min: 2.22% max: 37.50% x̄: 13.78% x̃: 10.00% 95% mean confidence interval for bundles value: -1.37 0.42 95% mean confidence interval for bundles %-change: -3.99% 0.04% Inconclusive result (value mean confidence interval includes 0). total quadwords in shared programs: 76320 -> 75140 (-1.55%) quadwords in affected programs: 16691 -> 15511 (-7.07%) helped: 206 HURT: 5 helped stats (abs) min: 1 max: 18 x̄: 5.91 x̃: 6 helped stats (rel) min: 0.36% max: 27.78% x̄: 7.93% x̃: 8.33% HURT stats (abs) min: 1 max: 19 x̄: 7.40 x̃: 1 HURT stats (rel) min: 0.55% max: 15.79% x̄: 7.39% x̃: 3.57% 95% mean confidence interval for quadwords value: -6.19 -5.00 95% mean confidence interval for quadwords %-change: -8.32% -6.82% Quadwords are helped. total registers in shared programs: 6958 -> 6827 (-1.88%) registers in affected programs: 1083 -> 952 (-12.10%) helped: 112 HURT: 16 helped stats (abs) min: 1 max: 3 x̄: 1.32 x̃: 1 helped stats (rel) min: 6.25% max: 50.00% x̄: 17.13% x̃: 12.50% HURT stats (abs) min: 1 max: 2 x̄: 1.06 x̃: 1 HURT stats (rel) min: 9.09% max: 20.00% x̄: 11.97% x̃: 11.81% 95% mean confidence interval for registers value: -1.19 -0.86 95% mean confidence interval for registers %-change: -15.78% -11.21% Registers are helped. total threads in shared programs: 5109 -> 5153 (0.86%) threads in affected programs: 62 -> 106 (70.97%) helped: 42 HURT: 6 helped stats (abs) min: 1 max: 2 x̄: 1.19 x̃: 1 helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00% HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1 HURT stats (rel) min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00% 95% mean confidence interval for threads value: 0.68 1.16 95% mean confidence interval for threads %-change: 66.69% 95.81% Threads are helped. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8973>
2021-02-11pan/mdg: Update UBO promotion commentAlyssa Rosenzweig1-4/+3
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8973>
2021-02-11panfrost: Move sysvals to dedicated UBOAlyssa Rosenzweig2-7/+4
This makes UBO 0 less special, allowing us to generalize uniform optimization. Note this disables RMU on Midgard as we're about to rewrite the RMU mechanism. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8973>
2021-02-11pan/mdg: Set lower_uniforms_to_uboAlyssa Rosenzweig1-7/+16
Removes our custom load_uniform implementation and unifies the command stream side with Bifrost, preparing for additional optimizations. shader-db results are a wash. It's worth noting some of the increase in bundles is due to peephole select which is notoriously awkward for shader-db stats. total instructions in shared programs: 96611 -> 95613 (-1.03%) instructions in affected programs: 17562 -> 16564 (-5.68%) helped: 137 HURT: 13 helped stats (abs) min: 2 max: 27 x̄: 7.83 x̃: 7 helped stats (rel) min: 0.61% max: 20.00% x̄: 7.19% x̃: 5.75% HURT stats (abs) min: 1 max: 33 x̄: 5.77 x̃: 2 HURT stats (rel) min: 0.47% max: 15.64% x̄: 3.56% x̃: 1.72% 95% mean confidence interval for instructions value: -7.78 -5.53 95% mean confidence interval for instructions %-change: -7.13% -5.38% Instructions are helped. total bundles in shared programs: 44886 -> 45230 (0.77%) bundles in affected programs: 6649 -> 6993 (5.17%) helped: 54 HURT: 68 helped stats (abs) min: 1 max: 6 x̄: 2.35 x̃: 2 helped stats (rel) min: 1.04% max: 6.82% x̄: 4.37% x̃: 4.80% HURT stats (abs) min: 1 max: 16 x̄: 6.93 x̃: 6 HURT stats (rel) min: 2.22% max: 37.50% x̄: 14.03% x̃: 10.00% 95% mean confidence interval for bundles value: 1.78 3.85 95% mean confidence interval for bundles %-change: 3.73% 8.04% Bundles are HURT. total quadwords in shared programs: 76320 -> 75533 (-1.03%) quadwords in affected programs: 12404 -> 11617 (-6.34%) helped: 133 HURT: 3 helped stats (abs) min: 1 max: 18 x̄: 6.18 x̃: 6 helped stats (rel) min: 0.36% max: 18.18% x̄: 7.34% x̃: 7.45% HURT stats (abs) min: 1 max: 19 x̄: 11.67 x̃: 15 HURT stats (rel) min: 0.55% max: 15.79% x̄: 9.94% x̃: 13.48% 95% mean confidence interval for quadwords value: -6.41 -5.16 95% mean confidence interval for quadwords %-change: -7.58% -6.34% Quadwords are helped. total registers in shared programs: 6958 -> 6928 (-0.43%) registers in affected programs: 524 -> 494 (-5.73%) helped: 42 HURT: 15 helped stats (abs) min: 1 max: 2 x̄: 1.10 x̃: 1 helped stats (rel) min: 6.25% max: 25.00% x̄: 12.71% x̃: 12.50% HURT stats (abs) min: 1 max: 2 x̄: 1.07 x̃: 1 HURT stats (rel) min: 9.09% max: 20.00% x̄: 11.44% x̃: 11.11% 95% mean confidence interval for registers value: -0.79 -0.26 95% mean confidence interval for registers %-change: -9.35% -3.36% Registers are helped. total threads in shared programs: 5109 -> 5107 (-0.04%) threads in affected programs: 16 -> 14 (-12.50%) helped: 2 HURT: 6 helped stats (abs) min: 2 max: 2 x̄: 2.00 x̃: 2 helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00% HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1 HURT stats (rel) min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00% 95% mean confidence interval for threads value: -1.41 0.91 95% mean confidence interval for threads %-change: -70.55% 45.55% Inconclusive result (value mean confidence interval includes 0). Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> WIP - do peephole ourselves Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8973>
2021-02-11pan/mdg: Optimize UBO offset calculationsAlyssa Rosenzweig3-6/+32
LD_UNIFORM supports constant shifts and biases, just like LD, so take advantage of that. Will avoid a regression in code quality from lowering uniforms to UBOs. No shader-db changes. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8973>
2021-02-11pan/mdg: Add MIDGARD_MESA_DEBUG=inorder optionAlyssa Rosenzweig3-0/+8
Helpful to disable the scheduler when debugging, so the assembly can be compared against the NIR directly when lost in a big dEQP test. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8973>
2021-02-11pan/mdg: Fix multithreaded shader-dbAlyssa Rosenzweig1-5/+2
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8973>
2021-02-03pan/mdg: Drop unused stage parameter to disassemblerAlyssa Rosenzweig3-7/+4
No longer used but was adding a dependency on compiler/shader_enums.h Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8829>
2021-01-27pan/mdg: implement nir_intrinsic_image_sizeItalo Nicola1-0/+6
To implement it in midgard, we just need to read the image_size sysval. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8066>
2021-01-27pan/mdg: implement shader image instructionsItalo Nicola3-12/+149
Implements load store opreations as midgard_op_ld_image_* and midgard_op_st_image_*. Implements midgard_op_lea_tex, which takes an image coordinate and returns it's memory address. Image atomics are implemented as a combination of midgard_op_lea_tex and the usual midgard atomic opcodes. Currently we don't support multisampled shader images. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8066>
2021-01-27pan/mdg: rename st_image opcodes and add float16 versionsItalo Nicola2-8/+10
Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8066>
2021-01-27pan/mdg: add ld_image opcodesItalo Nicola2-0/+10
Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8066>
2021-01-27pan/mdg: enable image bitsize lowering passItalo Nicola1-0/+3
Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8066>
2021-01-27pan/mdg: create nir pass to lower image coord bitsizeItalo Nicola3-0/+82
Image coordinates are 16-bit long in midgard, so we must lower them before emitting image opcodes. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8066>
2021-01-25panfrost: Assume that nir_tex_instr::dest_type is sizedConnor Abbott1-2/+1
Get rid of some now-redundant code, and cleanup the is-float check in the bifrost compiler. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
2021-01-18pan/mdg: Fix spilling when scratch memory is usedIcecream951-2/+2
Add the tls_size from NIR before spilling so that it doesn't alias with spill slots. Fixes: 152bc5d15e1 ("pan/mdg: Support loads and stores to scratch memory") Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18pan/mdg: Allow 64-bit src_bitsize for comparison operationsIcecream951-1/+1
Fixes Piglit test attributes.cl. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18pan/mdg: Don't reorder loads/stores past each otherIcecream951-0/+30
Fixes Piglit test local-memory.cl. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18pan/mdg: Limit int64 vectorizationIcecream951-1/+25
Previously, nir_opt_vectorize was sometimes vectorizing 64-bit load_const instructions to vec4. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18panfrost: Add a sysval for local_work_dimIcecream951-0/+1
Fixes Piglit test get-work-dim.cl. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18panfrost: Add a sysval for local_group_sizeIcecream951-0/+1
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-11nir: replace .lower_sub with .has_fsub and .has_isubDaniel Schürmann1-0/+2
This allows a more fine-grained control about whether a backend supports one of these instructions. Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6597>
2021-01-11nir/lower_vec_to_movs: don't vectorize unsupports opsErico Nunes1-1/+1
If the instruction being coalesced would be vectorized but the target doesn't support vectorizing that op, skip coalescing. Reuse the callbacks from alu_to_scalar to describe which ops should not be vectorized. Signed-off-by: Erico Nunes <nunes.erico@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6506>
2021-01-04treewide: Disambiguate various variables named "debug_options"Adam Jackson1-2/+2
Name them after what they control so 'vi -t' can take you somewhere useful. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8165>
2021-01-01pan/mdg: Support loads and stores to scratch memoryIcecream952-3/+9
Similar to shared memory load/store, except giving a different memory type to the hardware. Add nir->scratch_size to ctx->tls_size to allocate the memory. Tested with the Piglit OpenCL test i32-stack-array.cl. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01pan/mdg: Invert the type conditional for load intrinsicsIcecream951-2/+2
There are now more intrinsics for which nir_type_uint is forced than where the destination type is used to find the intrinsic type, so invert the conditional so that nir_type_uint is the default case when nothing more specific is given. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01pan/mdg: Pass the memory type to mir_set_offset directlyIcecream953-10/+23
We want to add support for more memory types, so replace the is_shared bool with an integer that is directly stored to load_store.arg_1. The new memory type values are off by 0x40, as that bit now comes from the index type. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01pan/mdg: Add i2i64 to mir_match_offsetIcecream951-0/+20
Similar to the existing u2u64 function, but with a different type. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01pan/mdg: Return false instead of asserting in mir_args_ssaIcecream951-1/+3
mir_args_ssa asserted that the given number of arguments to use is greater than or equal to the actual number, but this is not checked by callers, so instead of crashing return false to mark failure. Fixes the local memory atomics OpenCL tests in Piglit. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01pan/mdg: Replace zext with a type enumIcecream951-9/+22
The index type is actually a two-bit field, with support for both sign and zero extension. What was previously labelled as `zext` actually does sign-extension, but we want that in most cases anyway. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01pan/mdg: Support nir_intrinsic_group_memory_barrierIcecream951-0/+1
Treat it like the other memory barriers and do nothing. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01pan/mdg: Support nir_intrinsic_load_global_constantIcecream951-1/+3
Treat it the same as nir_intrinsic_load_global. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01pan/mdg: Use the pan_nir_lower_64bit_intrin NIR passIcecream951-0/+2
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01pan/mdg: Set compute lowering optionsIcecream951-1/+4
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>