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mesa/mesa
10.0
10.1
10.2
10.3
10.4
10.5
10.6
11.0
11.1
11.2
12.0
13.0
17.0
17.1
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17.3
18.0
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18.3
19.0
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20.0
20.1
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21.0
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21.3
22.0
22.1
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22.3
23.0
23.1
23.2
23.3
24.0
7.10
7.11
7.8
7.8-gles
7.9
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9.0
9.1
9.2
a7xx-gmem
amber
explicit-sync
main
powervr-mesa-next-wayland
review/fragment_shader_barycentric
staging/23.2
staging/23.3
staging/24.0
uav-counter-meta
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The Mesa 3D Graphics Library (mirrored from https://gitlab.freedesktop.org/mesa/mesa)
brianp
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src
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mesa
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drivers
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dri
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i965
/
gen6_urb.c
Age
Commit message (
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)
Author
Files
Lines
2013-07-09
i965: Pass brw_context to functions rather than intel_context.
Kenneth Graunke
1
-2
/
+1
2013-04-11
i965/vs: split brw_vs_prog_data into generic and VS-specific parts.
Paul Berry
1
-1
/
+1
2013-04-04
i965: Turn brw->urb.vs_size and gs_size into local variables.
Kenneth Graunke
1
-9
/
+9
2011-12-07
i965 gen6: Allocate URB space for GS
Paul Berry
1
-12
/
+57
2011-10-29
i965: Fold the gen6/7 URB state prepare()/emit() together.
Eric Anholt
1
-9
/
+3
2011-06-18
i965: Use state streaming on programs, and state base address on gen5+.
Eric Anholt
1
-1
/
+1
2011-05-17
i965: Rename max_vs_handles to max_vs_entries for consistency.
Kenneth Graunke
1
-2
/
+2
2011-04-18
i965: Allocate the whole URB to the VS and fix calculations for Gen6.
Kenneth Graunke
1
-17
/
+17
2011-03-03
i965: SNB GT1 has only 32k urb and max 128 urb entries.
Zou Nan hai
1
-4
/
+15
2011-03-02
i965: Maxinum the usage of urb space on SNB.
Zou Nan hai
1
-10
/
+6
2011-01-06
i965: Rename various gen6 #defines to match the documentation.
Kenneth Graunke
1
-1
/
+1
2010-12-06
i965: Fix GS state uploading on Sandybridge
Zhenyu Wang
1
-1
/
+1
2010-10-26
i965: Fix VS URB entry sizing.
Eric Anholt
1
-1
/
+1
2010-10-19
i965: Remove the gen6 emit_mi_flushes I sprinkled around the driver.
Eric Anholt
1
-4
/
+0
2010-02-25
i965: Fix the SNB URB entry count setup.
Eric Anholt
1
-2
/
+2
2010-02-25
i965: Giant pile of flushing to track down SNB bringup issues.
Eric Anholt
1
-0
/
+2
2010-02-25
i965: Set up the SNB URB.
Eric Anholt
1
-0
/
+81