path: root/src/intel
AgeCommit message (Expand)AuthorFilesLines
2017-06-20i965: Add a variable for way size per bank in get_l3_way_size()Anuj Phogat1-5/+4
2017-06-20i965: Fix broxton 2x6 l3 configAnuj Phogat1-0/+16
2017-06-20intel/blorp: Apply source offset in the TEX caseIan Romanick1-0/+3
2017-06-20intel/blorp: Apply Gen4 coord. normalization after cubemap sizes are adjustedIan Romanick1-9/+11
2017-06-20intel/blorp: Set needs_(dst|src)_offset for Gen4 cubemapsJason Ekstrand1-2/+6
2017-06-19intel: common: add number of thread per euLionel Landwerlin2-2/+28
2017-06-19intel: common: express timestamps units in frequencyLionel Landwerlin3-12/+14
2017-06-19intel: common: add flag to identify platforms by nameLionel Landwerlin2-6/+24
2017-06-19anv: Fix L3 cache programming on Bay TrailJonas Kulla1-1/+1
2017-06-17intel/isl/gen6: Allow arrayed stencilTopi Pohjolainen1-1/+0
2017-06-16genxml: The viewport state offset is actually an address.Rafael Antognolli1-1/+1
2017-06-16genxml: Rename fields to match gen6+.Rafael Antognolli3-3/+3
2017-06-16genxml: Rename SF_STATE field to match gen6+.Rafael Antognolli3-9/+9
2017-06-16intel/isl: Add the maximum surface size limitAnuj Phogat1-0/+22
2017-06-16intel/isl: Use uint64_t to store total surface sizeAnuj Phogat2-2/+3
2017-06-14intel/blorp: Work around Sandy Bridge occlusion query issueJason Ekstrand1-0/+10
2017-06-14intel/isl: Properly set SeparateStencilBufferEnable on gen5-6Jason Ekstrand1-3/+10
2017-06-14genxml: Fix Gen4-5 SF_STATE "Line Width" fixed point type.Kenneth Graunke3-3/+3
2017-06-09i965/cnl: Add a preliminary device for CannonlakeBen Widawsky1-0/+46
2017-06-09anv: Don't advertise support on anything above gen9Jason Ekstrand1-1/+1
2017-06-09i965/cnl: Enable CCS_E and RT support for few formatsAnuj Phogat1-9/+9
2017-06-09i965/cnl: Reformat surface_format_info table to accomodate gen10+Anuj Phogat1-263/+263
2017-06-09i965/cnl: Make URB {VS, GS, HS, DS} sizes non multiple of 3Anuj Phogat4-4/+33
2017-06-09i965/cnl: Handle gen10 in switch cases across the driverAnuj Phogat4-0/+13
2017-06-09i965/cnl: Update few assertionsAnuj Phogat1-1/+1
2017-06-09i965/cnl: Add cnl bits in aubinatorAnuj Phogat1-3/+5
2017-06-09i965/cnl: Wire up android Mesa build files for gen10Anuj Phogat3-0/+46
2017-06-09i965/cnl: Wire up Mesa build files for gen10Anuj Phogat3-3/+18
2017-06-09intel/genxml: Update genx_bits for gen10+Anuj Phogat1-4/+2
2017-06-09i965/cnl: Add gen10 specific function declarationsAnuj Phogat1-0/+12
2017-06-09i965/cnl: Include gen10_pack.hAnuj Phogat1-0/+2
2017-06-09i965/cnl: Define genX(x) and GENX(x) for gen10Anuj Phogat1-0/+3
2017-06-09i965/genxml: Add gen10.xmlJason Ekstrand1-0/+3562
2017-06-09i965: Make feature macros gen8 basedBen Widawsky1-8/+5
2017-06-07intel/isl: Add an enum for describing auxiliary compression stateJason Ekstrand1-0/+169
2017-06-07blorp: Use FullSurfaceDepthandStencilClear for blorp_hiz_opJason Ekstrand3-0/+5
2017-06-07intel/blorp: Plumb through access to the workaround BOJason Ekstrand2-2/+19
2017-06-07anv/blorp: Move the depth cache flush outside of BLORPNanley Chery2-8/+16
2017-06-07intel/blorp: Refactor the HiZ op interfaceJason Ekstrand3-53/+59
2017-06-07i965/miptree: Store fast clear colors in an isl_color_valueJason Ekstrand3-2/+21
2017-06-06intel: Fix broxton 2x6 way size computationAnuj Phogat1-0/+4
2017-06-07tree-wide: remove trailing backslashEric Engestrom1-1/+1
2017-06-06anv: Set better descriptor set limitsAlex Smith1-3/+6
2017-06-06anv: Set driver version to Mesa versionAlex Smith1-1/+1
2017-06-06util/vulkan: Move Vulkan utilities to src/vulkan/utilAlex Smith8-8/+8
2017-06-06intel: gen-decoder: rework how we handle groupsLionel Landwerlin3-104/+161
2017-06-05i965: Change INTEL_DEBUG=vec4 to INTEL_SCALAR_VS for consistency.Kenneth Graunke3-3/+2
2017-06-02i965: Simplify l3 way size computationsAnuj Phogat1-10/+2
2017-06-02i965: Add and initialize l3_banks field for gen7+Anuj Phogat2-3/+27
2017-06-01intel/blorp: Handle gen6 stencil/HiZ offsets in the back-endJason Ekstrand1-2/+30