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path: root/src/intel/compiler/brw_fs.cpp
AgeCommit message (Expand)AuthorFilesLines
4 daysintel/compiler: Implement Mesh OutputCaio Oliveira1-0/+4
4 daysintel/compiler: Add backend compiler basics for Task/MeshCaio Oliveira1-0/+106
4 daysintel/compiler: Export brw_nir_lower_simdCaio Oliveira1-1/+1
4 daysintel/compiler: Make MUE available when setting up FS URB accessCaio Oliveira1-4/+9
4 daysintel/compiler: Handle per-primitive inputs in FSCaio Oliveira1-8/+40
4 daysintel/compiler: Properly lower WorkgroupId for Task/MeshCaio Oliveira1-7/+13
2021-11-22intel/compiler: Add new variant for TXF_CMS_WTopi Pohjolainen1-3/+16
2021-11-22intel/compiler: Prepare ld2dms_w for 4 mcs componentsTopi Pohjolainen1-11/+14
2021-11-22intel/compiler: Demote sampler params to 16-bit for CMS/UMS/MCSTopi Pohjolainen1-6/+33
2021-11-22intel/compiler/fs: Add support for 16-bit sampler msg payloadTopi Pohjolainen1-26/+77
2021-11-22intel/compiler: Add helper to support half float payload with paddingSagar Ghuge1-0/+43
2021-11-22intel/compiler: Don't hardcode padding source type to 32bitSagar Ghuge1-3/+1
2021-11-08intel: move away from booleans to identify platformsLionel Landwerlin1-6/+6
2021-11-03intel/compiler: Use gl_shader_stage_uses_workgroup() helpersCaio Oliveira1-1/+1
2021-11-03intel/compiler: Make brw_nir_populate_wm_prog_data() staticCaio Oliveira1-1/+1
2021-11-03intel/compiler: Change selected_simd return type to int.Vinson Lee1-1/+1
2021-10-26intel/compiler: Use SIMD selection helpers for variable workgroup sizeCaio Marcelo de Oliveira Filho1-36/+6
2021-10-26intel/compiler: Use SIMD selection helpers for CSCaio Marcelo de Oliveira Filho1-208/+63
2021-10-21intel/compiler: Set correct cache policy for A64 byte scattered readSagar Ghuge1-1/+1
2021-10-15intel: fix INTEL_DEBUG environment variable on 32-bit systemsMarcin Ślusarz1-22/+22
2021-10-05intel/compiler: use nir_shader_instructions_pass in brw_nir_demote_sample_qua...Marcin Ślusarz1-35/+27
2021-10-05intel/compiler: add missing line returns to logsLionel Landwerlin1-6/+6
2021-10-01intel/compiler: drop redundant likely's around INTEL_DEBUGMarcin Ślusarz1-2/+2
2021-09-30intel/compiler: Use INTEL_DEBUG=blorp to dump blorp compute shadersJordan Justen1-1/+2
2021-09-21intel/fs: Handle required subgroup sizes specified in the SPIR-VJason Ekstrand1-2/+11
2021-09-09intel/compiler: Add support to handle 64-bit atomics with A32 messagesSagar Ghuge1-4/+6
2021-09-09intel/compiler: Add 64-bit A64 float logical opcode supportSagar Ghuge1-0/+4
2021-09-09intel/fs: Add support for atomic_faddJason Ekstrand1-0/+2
2021-08-31intel/fs: fix framebuffer readsLionel Landwerlin1-0/+14
2021-08-30intel/compiler: Move type_is_unsigned_int to brw_reg_type.hIan Romanick1-1/+1
2021-08-11intel/fs: sel.cond writes the flags on Gfx4 and Gfx5Ian Romanick1-4/+8
2021-08-01intel/compiler: Add id parameter to shader_perf_log callbackIan Romanick1-24/+25
2021-07-30intel/fs: restrict max push length on older GPUs to a smaller amountDave Airlie1-3/+10
2021-07-22intel/compiler: Handle ternary add in lower_simd_widthSagar Ghuge1-0/+1
2021-07-14intel/dev: Add a max_cs_workgroup_threads fieldJason Ekstrand1-3/+2
2021-06-30intel/fs: Lower uniform pull constant load message to LSC dataportJason Ekstrand1-2/+52
2021-06-30intel/fs: Lower varying pull constant load message to LSC dataportSagar Ghuge1-1/+83
2021-06-30intel/fs: Lower A64 atomic messages to LSC dataportSagar Ghuge1-5/+31
2021-06-30intel/fs: Lower A64 byte scattered r/w messages to LSC dataportSagar Ghuge1-2/+22
2021-06-30intel/fs: Lower A64 untyped r/w messages to LSC when availableMark Janes1-0/+70
2021-06-30intel/fs: Lower Byte scattered r/w messages to LSC when availableSagar Ghuge1-2/+35
2021-06-30intel/fs: Lower untyped float atomic messages to LSC when availableSagar Ghuge1-4/+23
2021-06-30intel/fs: Lower untyped atomic messages to LSC when availableMark Janes1-1/+53
2021-06-30intel/fs: Lower DW untyped r/w messages to LSC when availableMark Janes1-0/+123
2021-06-23intel/fs/xehp: Assert that the compiler is sending all 3 coords for cubemaps.Francisco Jerez1-2/+4
2021-06-22intel/fs: Don't pull CS push constants if uses_inline_dataJason Ekstrand1-1/+10
2021-06-22intel/fs: Add support for compiling bindless shaders with resume shadersJason Ekstrand1-19/+100
2021-06-08nir: Move workgroup_size and workgroup_variable_size into common shader_infoCaio Marcelo de Oliveira Filho1-8/+8
2021-06-07compiler: Rename local_size to workgroup_sizeCaio Marcelo de Oliveira Filho1-8/+8
2021-05-17intel: simplify is_haswell checks, part 1Marcin Ślusarz1-11/+11