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AgeCommit message (Expand)AuthorFilesLines
2019-07-01Revert "meson: Add support for using cmake for finding LLVM"Dylan Baker3-21/+11
2019-07-01Revert "iris/icl: Add WA_2204188704 to disable pixel shader panic dispatch"Anuj Phogat1-8/+0
2019-07-01radeon/uvd: fix calc_ctx_size_h265_main10Pierre-Eric Pelloux-Prayer3-9/+9
2019-06-28gallium: Make util_copy_image_view handle shader_accessKenneth Graunke1-0/+2
2019-06-28intel: Add and use helpers for level0 extentNanley Chery1-6/+2
2019-06-28iris: Enable PIPE_CAP_SURFACE_REINTERPRET_BLOCKSKenneth Graunke2-6/+95
2019-06-28meson: Add support for using cmake for finding LLVMDylan Baker3-11/+21
2019-06-25freedreno/a5xx: fix batch leak in fd5 blitter pathRob Clark1-0/+1
2019-06-21iris: Fix iris_flush_and_dirty_history to actually dirty history.Kenneth Graunke1-0/+2
2019-06-19nouveau: fix frees in unsupported IR error paths.Dave Airlie4-0/+6
2019-06-18freedreno/a6xx: un-swap X24S8_UINTRob Clark2-5/+6
2019-06-18virgl: Assume sRGB write control for older guest kernels or virglrenderer hostsGert Wollny1-1/+2
2019-06-14freedreno/a5xx: Fix indirect draw max_indices calculationEduardo Lima Mitev1-2/+1
2019-06-14gallium/winsys/kms: Fix dumb buffer bppKevin Strasser1-1/+1
2019-06-14r300g: restore performance after RADEON_FLAG_NO_INTERPROCESS_SHARING was addedRichard Thier5-6/+20
2019-06-09freedreno/a6xx: fix hangs with newer sqe fwRob Clark1-32/+81
2019-06-09freedreno/a6xx: fix issues with gallium HUDRob Clark1-5/+8
2019-06-09svga: Remove unnecessary check for the pre flush bit for setting vertex buffersCharmaine Lee1-4/+4
2019-06-09winsys/svga/drm: Fix 32-bit RPCI send messageDeepak Rawat1-12/+23
2019-06-06winsys/drm: Fix out of scope variable usageDeepak Rawat1-12/+13
2019-06-04radeonsi: init sctx->dma_copy before using itPierre-Eric Pelloux-Prayer1-3/+3
2019-06-04d3dadapter9: Revert to old throttling limit valueAxel Davy1-2/+4
2019-06-04u_blitter: don't fail mipmap generation for depth formats containing stencilMarek Olšák1-1/+2
2019-06-04freedreno/a6xx: fix GPU crash on small render targetsRob Clark1-0/+7
2019-05-31swr/rast: fix 32-bit compilation on LinuxJan Zielinski1-65/+0
2019-05-30iris: Don't assume UBO indices are constantJason Ekstrand1-1/+2
2019-05-28lima: fix render to non-zero level textureQiang Yu1-4/+6
2019-05-28lima: fix lima_blit with non-zero level source resourceQiang Yu1-25/+12
2019-05-27etnaviv: use the correct uniform dirty bitsChristian Gmeiner1-2/+2
2019-05-23gallium: enable dmabuf on BSD as wellGreg V1-1/+1
2019-05-23etnaviv: fill missing offset in etna_resource_get_handlePhilipp Zabel1-0/+1
2019-05-23radeonsi: fix a regression in si_rebind_bufferMarek Olšák1-4/+8
2019-05-23radeonsi: update buffer descriptors in all contexts after buffer invalidationMarek Olšák3-33/+72
2019-05-21meson: expose glapi through osmesaEric Engestrom1-2/+2
2019-05-21draw: fix memory leak introduced 7720ce32aNeha Bhende1-1/+3
2019-05-21Revert "softpipe/buffer: load only as many components as the the buffer resou...Gert Wollny1-5/+2
2019-05-17radeonsi: remove old_va parameter from si_rebind_buffer by remembering offsetsMarek Olšák3-40/+25
2019-05-14softpipe/buffer: load only as many components as the the buffer resource type...Gert Wollny1-2/+5
2019-05-13iris: Use full ways for L3 cache setup on Icelake.Kenneth Graunke1-0/+1
2019-05-10winsys/amdgpu: add VCN JPEG to no user fence groupLeo Liu1-1/+2
2019-05-10panfrost: Only take the fast paths on buffers aligned to block sizeTomeu Vizoso1-2/+2
2019-05-10panfrost: Fix two uninitialized accesses in compilerTomeu Vizoso1-1/+1
2019-05-09kmsro: add _dri.so to two of the kmsro drivers.Dave Airlie1-2/+2
2019-05-07draw: flush when setting stream-out targetsErik Faye-Lund1-0/+2
2019-05-06mesa: android: freedreno: Fix build failure due to path changeJohn Stultz1-1/+1
2019-05-06mesa: android: freedreno: build libfreedreno_{drm,ir3} static libsAmit Pundir3-2/+9
2019-05-04freedreno: remove unused forward struct declaration19.1-branchpointRob Clark1-2/+0
2019-05-04panfrost/midgard: iabs cannot run on mulAlyssa Rosenzweig1-1/+1
2019-05-04panfrost/midgard: Lower mixed csel (NIR)Alyssa Rosenzweig2-12/+83
2019-05-04panfrost/midgard: Fix RA when temp_count = 0Alyssa Rosenzweig2-50/+70
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