path: root/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c
AgeCommit message (Expand)AuthorFilesLines
2020-06-18virgl: replace all dup() with os_dupfd_cloexec()Eric Engestrom1-2/+2
2020-06-18replace all F_DUPFD_CLOEXEC with os_dupfd_cloexec()Eric Engestrom1-1/+2
2020-05-13gallium: rename 'state tracker' to 'frontend'Marek Olšák1-1/+1
2020-03-27util: don't include p_defines.h and u_pointer.h from galliumMarek Olšák1-0/+1
2020-02-26gallium/hash_table: remove some function wrappersMarek Olšák1-10/+10
2020-02-26gallium/hash_table: turn it into a wrapper around util/hash_tableMarek Olšák1-1/+1
2020-02-26gallium/hash_table: consolidate hash tables with FD keysMarek Olšák1-23/+1
2020-02-26gallium/hash_table: consolidate hash tables with pointer keysMarek Olšák1-14/+2
2020-01-10virgl/drm: update UAPIGurchetan Singh1-1/+1
2019-11-14util: Move gallium's PIPE_FORMAT utils to /util/format/Eric Anholt1-1/+1
2019-10-02virgl: honor winsys supplied metadataGurchetan Singh1-1/+6
2019-10-02virgl: modify resource_create_from_handle(..) callbackGurchetan Singh1-1/+5
2019-10-02virgl: remove stride from virgl_hw_resGurchetan Singh1-2/+0
2019-09-18virgl: Remove wrong EAGAIN handling for drmIoctlLepton Wu1-3/+3
2019-09-14virgl: replace fprintf with _debug_printfLepton Wu1-5/+5
2019-08-26virgl: fix format conversion for recent gallium changes.Dave Airlie1-1/+1
2019-08-26virgl: drop unused format fieldDave Airlie1-1/+0
2019-06-20gallium/virgl: Add code path for virgl to read driconfGert Wollny1-2/+2
2019-06-17virgl: add resource_reference to virgl_winsysChia-I Wu1-18/+10
2019-06-14virgl: Use virgl_resource_cache in the drm winsysAlexandros Frantzis1-117/+38
2019-06-11virgl: consider newly created resources idleChia-I Wu1-6/+8
2019-06-11virgl: make resource_wait/resource_is_busy cheaperChia-I Wu1-0/+24
2019-06-11virgl: add virgl_drm_{alloc,free,clear}_res_listChia-I Wu1-17/+42
2019-06-11virgl: do not cache external resourcesChia-I Wu1-1/+7
2019-06-07virgl: Make VIRGL_BIND_STAGING resources cacheableAlexandros Frantzis1-1/+2
2019-06-07virgl: Deduplicate checks for resource cachingAlexandros Frantzis1-9/+7
2019-06-07virgl: Don't try to use cached resources for legacy fencesAlexandros Frantzis1-1/+4
2019-05-06virgl: export resource_is_busy from winsysChia-I Wu1-6/+7
2019-04-25virgl/drm: insert correct handles into the table. (v3)Dave Airlie1-1/+4
2019-04-25virgl/drm: handle flink name better.Dave Airlie1-18/+10
2019-04-25virgl/drm: cleanup buffer from handle creation (v2)Dave Airlie1-14/+13
2019-04-15virgl: fix fence fd version checkChia-I Wu1-2/+2
2019-04-15virgl: introduce virgl_drm_fenceChia-I Wu1-38/+102
2019-04-15virgl: hide fence internals from the driverChia-I Wu1-16/+24
2019-04-15virgl: handle fence_server_sync in winsysChia-I Wu1-9/+22
2019-04-02virgl: close drm fd when destroying virgl screen.Lepton Wu1-0/+1
2019-03-13virgl: use uint16_t mask instead of separate booleansGurchetan Singh1-50/+51
2019-02-15virgl: make winsys modifications for encoded transfersGurchetan Singh1-1/+12
2018-11-19virgl: Use file descriptor instead of un-allocated objectGert Wollny1-1/+1
2018-11-18virgl: Clean up fences commitRobert Foss1-1/+0
2018-11-16virgl: native fence fd supportRobert Foss1-2/+82
2018-09-12winsys/virgl: avoid unintended behaviorErik Faye-Lund1-1/+1
2018-09-05winsys/virgl: Initialize value to silence valgrindGert Wollny1-1/+1
2018-09-05winsys/virgl: correct resource and handle allocation (v2)Gert Wollny1-5/+18
2018-07-24Revert "virgl: remove unused stride-arguments"Dave Airlie1-0/+6
2018-07-23virgl: remove unused stride-argumentsErik Faye-Lund1-6/+0
2018-06-19virgl: Remove debugging left-oversTomeu Vizoso1-2/+0
2018-05-30gallium/winsys: rename DRM_API_HANDLE_* to WINSYS_HANDLE_*Dave Airlie1-6/+6
2018-04-23virgl: disable virgl when no 3D for virtio gpu.Lepton Wu1-0/+11
2018-03-15virgl: resize resource bo allocation if we need to.Dave Airlie1-2/+6