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2019-05-10winsys/amdgpu: add VCN JPEG to no user fence groupLeo Liu1-1/+2
There is no user fence for JPEG, the bug triggering kernel WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT) Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit ceba9ff2948d7efa57d7035c7717f046303e7c64)
2019-04-23winsys/amdgpu: clean up and remove nonsensical assertionMarek Olšák1-2/+1
The assertion considers max_dw from the current IB in the chain, but big_ib_buffer is a buffer for the next IB, which can be smaller. Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2019-04-23winsys/amdgpu: enable chaining for compute IBsMarek Olšák1-6/+6
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2019-04-23winsys/amdgpu: reorder chunks, make BO_HANDLES first, IB and FENCE lastMarek Olšák1-19/+17
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2019-04-23winsys/amdgpu: make IBs writable and expose their addressMarek Olšák1-1/+3
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2019-04-23ac: add radeon_info::marketing_name, replacing the winsys callbackMarek Olšák1-7/+0
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2019-04-16winsys/amdgpu: don't set GTT with GDS & OA placements on APUsMarek Olšák1-9/+11
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2019-04-15Delete autotoolsDylan Baker1-19/+0
Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Jason Ekstrand <jason@jlekstrand.net> Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Acked-by: Matt Turner <mattst88@gmail.com>
2019-04-15ac: Move has_local_buffers disable to radeonsi.Bas Nieuwenhuizen1-0/+4
In radv we had a separate flag to actually use it + an env option to experimentally use it. The common code setting has_local_buffers to false of course broke that experimental option. Also the "enable on APU" did not make sense for RADV as it is still disabled by default. Fixes: b21a4efb553 "radv/winsys: allow local BOs on APUs" Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-04radeonsi: add support for displayable DCC for 1 RB chipsMarek Olšák1-0/+8
This is the simpler codepath - just disable RB and pipe alignment for DCC.
2019-02-11winsys/amdgpu: cs_check_space sets the minimum IB size for future IBsMarek Olšák2-2/+23
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2019-02-11winsys/amdgpu: clean up IB buffer size computationMarek Olšák1-8/+4
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2019-02-11winsys/amdgpu: remove occurence of INDIRECT_BUFFER_CONSTMarek Olšák1-2/+1
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2019-02-11winsys/amdgpu: use a separate fence list for syncobjsMarek Olšák2-17/+15
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2019-02-11winsys/amdgpu: unify fence list codeMarek Olšák2-59/+42
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2019-02-11winsys/amdgpu: don't drop manually added fence dependenciesMarek Olšák1-2/+0
wow, it's hard to believe that fence and syncobjs dependencies were ignored. Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2019-01-30winsys/amdgpu: remove amdgpu_drm.h definitionsMarek Olšák1-8/+0
trivial
2019-01-22winsys/amdgpu: rename rfence, rsrc, rdst -> afence, asrc, adstMarek Olšák2-23/+23
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-01-22winsys/amdgpu: use the new BO list APIMarek Olšák1-49/+25
2018-12-19winsys/amdgpu: Pull in LLVM CFLAGSMichel Dänzer2-1/+2
Fixes build failure if the LLVM headers aren't in a standard include directory. Fixes: ec22dd34c88f "radeonsi: move SI_FORCE_FAMILY functionality to winsys" Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-12-19radeonsi: move SI_FORCE_FAMILY functionality to winsysNicolai Hähnle1-0/+36
This helps some debugging cases by initializing addrlib with slightly more appropriate settings. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-11-29Revert "winsys/amdgpu: overallocate buffers for faster address translation ↵Marek Olšák1-24/+0
on Gfx9" I didn't mean to push this. I don't think it makes any difference. This reverts commit f737fe00a047ae1ae9ec4e15a4ea8b578389f2f6.
2018-11-29amd/addrlib: update Mesa's copy of addrlibNicolai Hähnle1-1/+1
Update to the internal master as of 2018-11-15. This has a lot of gratuitous whitespace change, but on the plus side it's built using the same tooling that's used for AMDVLK, which should help going forward.
2018-11-28winsys/amdgpu: add support for allocating GDS and OA resourcesMarek Olšák1-22/+33
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-11-28winsys/amdgpu: use optimal VM alignment for CPU allocationsMarek Olšák1-2/+4
Acked-by: Christian König <christian.koenig@amd.com>
2018-11-28winsys/amdgpu: use optimal VM alignment for imported buffersMarek Olšák1-20/+29
Window system buffers didn't use the optimal alignment. Acked-by: Christian König <christian.koenig@amd.com>
2018-11-28winsys/amdgpu,radeon: pass vm_alignment to buffer_from_handleMarek Olšák1-1/+2
Acked-by: Christian König <christian.koenig@amd.com>
2018-11-28winsys/amdgpu: overallocate buffers for faster address translation on Gfx9Marek Olšák1-0/+24
Sadly, the 3 games I tested (DeusEx:MD, DiRT Rally, DOTA 2) are unaffected by the overallocation, because I guess their buffers don't fall into the small range below a power-of-two size. Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-11-28winsys/amdgpu: increase the VM alignment to the MSB of the size for Gfx9Marek Olšák1-1/+11
Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-11-28winsys/amdgpu: use >= instead of > for VM address alignmentMarek Olšák1-1/+1
Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-11-28winsys/amdgpu: clean up code around BO VM alignmentMarek Olšák1-2/+7
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-11-28winsys/amdgpu: optimize slab allocation for 2 MB amdgpu page tablesMarek Olšák3-2/+10
- the slab buffer size increased from 128 KB to 2 MB (PTE fragment size) - the max suballocated buffer size increased from 64 KB to 256 KB, this increases memory usage because it wastes memory - the number of suballocators increased from 1 to 3 and they are layered on top of each other to minimize unused space in slabs The final increase in memory usage is: DeusEx:MD: 1.8% DOTA 2: 1.75% DiRT Rally: 0.2% The kernel driver will also receive fewer buffers.
2018-11-28radeonsi: generalize the slab allocator code to allow layered slab allocatorsMarek Olšák3-24/+86
There is no change in behavior. It just makes it easier to change the number of slab allocators.
2018-11-28winsys/amdgpu: always reclaim/release slabs if there is not enough memoryMarek Olšák1-7/+13
2018-11-28winsys/amdgpu: explicitly declare whether buffer_map is permanent or notNicolai Hähnle2-33/+66
Introduce a new driver-private transfer flag RADEON_TRANSFER_TEMPORARY that specifies whether the caller will use buffer_unmap or not. The default behavior is set to permanent maps, because that's what drivers do for Gallium buffer maps. This should eliminate the need for hacks in libdrm. Assertions are added to catch when the buffer_unmap calls don't match the (temporary) buffer_map calls. I did my best to update r600 for consistency (r300 needs no changes because it never calls buffer_unmap), even though the radeon winsys ignores the new flag. As an added bonus, this should actually improve the performance of the normal fast path, because we no longer call into libdrm at all after the first map, and there's one less atomic in the winsys itself (there are now no atomics left in the UNSYNCHRONIZED fast path). Cc: Leo Liu <leo.liu@amd.com> v2: - remove comment about visible VRAM (Marek) - don't rely on amdgpu_bo_cpu_map doing an atomic write Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-11-28winsys/amdgpu: add amdgpu_winsys_bo::lockNicolai Hähnle3-13/+20
We'll use it in the upcoming mapping change. Sparse buffers have always had one. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-11-23winsys/amdgpu: fix a device handle leak in amdgpu_winsys_createMarek Olšák1-0/+6
Cc: 18.2 18.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-11-23winsys/amdgpu: fix a buffer leak in amdgpu_bo_from_handleMarek Olšák1-0/+6
Cc: 18.2 18.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-11-09radeonsi: stop command submission with PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET onlyMarek Olšák2-2/+5
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-11-07winsys/amdgpu: Stop using amdgpu_bo_handle_type_kms_noimportMichel Dänzer1-3/+3
It only behaves any different from amdgpu_bo_handle_type_kms with libdrm 2.4.93, and it breaks if an older version is picked up. Bugzilla: https://bugs.freedesktop.org/108096 Reviewed-by: Marek Olšák <marek.olsak@amd.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-10-23winsys/amdgpu: add vcn jpeg cs supportBoyuan Zhang1-0/+12
Add vcn jpeg cs support, align cs by no-op. Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-09-07radeonsi: pin the winsys thread to the requested L3 cache (v2)Marek Olšák1-0/+10
v2: rebase Reviewed-by: Brian Paul <brianp@vmware.com>
2018-08-30radeonsi: add radeonsi_zerovram driconfig optionTimothy Arceri1-3/+7
More and more games seem to require this so lets make it a config option. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-08-03winsys/amdgpu: pass the BO list via the CS ioctl on DRM >= 3.27.0Marek Olšák3-4/+58
2018-07-31radeonsi: use storage_samples instead of color_samples in most placesMarek Olšák1-2/+1
and use pipe_resource::nr_storage_samples instead of r600_texture::num_color_samples. Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-07-19winsys/amdgpu: remove RADEON_SURF_FMASK leftoverMarek Olšák1-7/+4
RADEON_SURF_FMASK is never set.
2018-07-18winsys/amdgpu: fix VDPAU interop by having one amdgpu_winsys_bo per BO (v2)Marek Olšák3-5/+41
Dependencies between rings are inserted correctly if a buffer is represented by only one unique amdgpu_winsys_bo instance. Use a hash table keyed by amdgpu_bo_handle to have exactly one amdgpu_winsys_bo per amdgpu_bo_handle. v2: return offset and stride properly Tested-by: Leo Liu <leo.liu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com>
2018-07-18winsys/amdgpu: use a better hash_pointer functionMarek Olšák1-8/+5
Tested-by: Leo Liu <leo.liu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com>
2018-07-18winsys/amdgpu: clean up error handling in amdgpu_bo_from_handleMarek Olšák1-20/+16
Tested-by: Leo Liu <leo.liu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com>
2018-07-18winsys/amdgpu: shorten bo->ws in amdgpu_bo_destroyMarek Olšák1-9/+10
Tested-by: Leo Liu <leo.liu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com>