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path: root/src/gallium/drivers
AgeCommit message (Expand)AuthorFilesLines
2018-10-09svga: change svga_destroy_shader_variant() to return voidBrian Paul5-23/+6
2018-10-09nvc0: fix blitting red to srgb8_alphaIlia Mirkin1-0/+4
2018-10-09nv50,nvc0: guard against zero-size blitsIlia Mirkin2-0/+14
2018-10-09nv50,nvc0: mark RGBX_UINT formats as renderableIlia Mirkin1-4/+4
2018-10-08freedreno/a5xx+a6xx: fix LRZ pitch alignmentRob Clark1-1/+1
2018-10-08freedreno/a6xx: add LRZ supportRob Clark8-132/+104
2018-10-08freedreno: update generated headersRob Clark7-38/+120
2018-10-08freedreno/a6xx: add helper for various CP_EVENT_WRITERob Clark5-38/+30
2018-10-08freedreno/a6xx: remove unused fxnsRob Clark2-19/+0
2018-10-08freedreno/a6xx: remove fd6_shader_stateobjRob Clark3-23/+10
2018-10-06util/u_queue: add UTIL_QUEUE_INIT_SET_FULL_THREAD_AFFINITYMarek Olšák1-1/+3
2018-10-06radeonsi: fix a typo at CS_PARTIAL_FLUSHMarek Olšák1-1/+1
2018-10-06ac: add ac_build_roundMarek Olšák1-3/+1
2018-10-06ac: correct PKT3_COPY_DATA definitionsMarek Olšák4-6/+6
2018-10-06ac: define all address spaces properlyMarek Olšák1-3/+3
2018-10-05radeonsi:optimizing SET_CONTEXT_REG for shaders vgt_vertex_reuseSonny Jiang4-2/+18
2018-10-05radeonsi:optimizing SET_CONTEXT_REG for shaders TessellationSonny Jiang4-5/+26
2018-10-05radeonsi:optimizing SET_CONTEXT_REG for shaders PSSonny Jiang3-14/+60
2018-10-05radeonsi:optimizing SET_CONTEXT_REG for shaders VSSonny Jiang3-33/+77
2018-10-05radeonsi:optimizing SET_CONTEXT_REG for shaders GSSonny Jiang4-24/+154
2018-10-05radeonsi: optimize and allow reg > 31 in radeon_opt_set_context_reg functionsMarek Olšák1-22/+12
2018-10-05radeonsi: optimizing SET_CONTEXT_REG for shaders ESSonny Jiang5-10/+37
2018-10-04etnaviv: Use write combine instead of unached mappings for shader boGuido Günther1-1/+1
2018-10-03freedreno: add the a6xx sources to the Android buildEmil Velikov1-0/+1
2018-10-03r600: use build-id when available for disk cacheTimothy Arceri1-7/+7
2018-10-03nouveau: use build-id when available for disk cacheTimothy Arceri1-7/+7
2018-10-03radeonsi: use build-id when available for disk cacheTimothy Arceri1-12/+9
2018-10-02radeonsi: avoid sending GS_EMIT in shaders without outputsJózef Kucia1-3/+6
2018-10-02radeonsi: initialize ac_gpu_info::name when using SI_FORCE_FAMILYMarek Olšák1-0/+1
2018-10-02radeonsi: don't set the VS prolog key for the blit VSMarek Olšák1-1/+2
2018-10-02freedreno/a6xx: hwbinningRob Clark8-105/+159
2018-10-02freedreno: update generated headersRob Clark7-41/+52
2018-10-02radeonsi: add a workaround for bitfield_extract when count is 0Timothy Arceri1-11/+30
2018-09-27freedreno/a6xx: Build up draw dword0 outside visibilty if statementKristian H. Kristensen1-17/+18
2018-09-27freedreno/a6xx: Simplify draw_emit() branches a bitKristian H. Kristensen1-16/+8
2018-09-27freedreno/a6xx: Copy OUT_RING() part into each branch of the index ifKristian H. Kristensen1-17/+29
2018-09-27freedreno/a6xx: Split fd6_draw_emit into direct and indirect pathsKristian H. Kristensen1-36/+46
2018-09-27freedreno/a6xx: Inline fd6_draw()Kristian H. Kristensen1-31/+17
2018-09-27freedreno/a6xx: Move emit_marker and wfi to draw_impl()Kristian H. Kristensen1-17/+12
2018-09-27freedreno/a6xx: Move inline functions out of fd6_draw.hKristian H. Kristensen3-108/+110
2018-09-27freedreno: fix a typo in launch_gridHyunjun Ko1-1/+1
2018-09-27freedreno/ir3: fix the param order of cmpxchgHyunjun Ko1-2/+2
2018-09-27freedreno/a6xx: fix shaders w/ >= 24 regsRob Clark1-1/+1
2018-09-27freedreno/a6xx: fix gl_FragCoord.wRob Clark1-2/+6
2018-09-27freedreno: handle invalidated buffers harderRob Clark8-7/+39
2018-09-27freedreno/a6xx: fix constlenRob Clark1-7/+6
2018-09-27freedreno: fix inorder rendering caseRob Clark1-6/+7
2018-09-27freedreno/a6xx: backface stencil stateRob Clark2-2/+4
2018-09-27freedreno/a6xx: fix gpu crash with separate-stencilRob Clark1-1/+1
2018-09-27freedreno/a6xx: fix MRT configRob Clark1-7/+7
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