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path: root/src/gallium/drivers/r600/r600_state.c
AgeCommit message (Expand)AuthorFilesLines
2024-04-09r600: update licensing to SPDX headerDavid Heidelberg1-19/+2
2024-01-06r300,r600,radeonsi: switch to pb_buffer_leanMarek Olšák1-2/+2
2024-01-06gallium/pb_buffer: define pb_buffer_lean without vtbl, inherit it by pb_bufferMarek Olšák1-2/+2
2023-10-31r600: Replace TGSI I/O semantics with shader_enumsVitaliy Triang3l Kuzmin1-35/+40
2023-10-31r600: Remove Gallium dependencies in r600_asmVitaliy Triang3l Kuzmin1-1/+2
2023-10-01r600: Replace R600_BIG_ENDIAN with UTIL_ARCH_BIG_ENDIANVitaliy Triang3l Kuzmin1-2/+3
2023-08-18r600: better tracking for vertex buffer emissionMike Blumenkrantz1-2/+2
2023-08-17r600: use correct cso pointer for fetch shaderGert Wollny1-1/+1
2023-08-14gallium: move vertex stride to CSOMike Blumenkrantz1-1/+3
2023-07-07r600: Pre-EG - Set wrap texture modes to repeat when seemless cube is usedGert Wollny1-0/+14
2023-06-27treewide: Replace the usage of TRUE/FALSE with true/falseYonggang Luo1-7/+7
2023-06-27treewide: replace usage of boolean to boolYonggang Luo1-2/+2
2023-05-01r600+sfn: Assign ps_conservative_z and switch to NIR definesGert Wollny1-3/+3
2023-04-17r600: Report multi-plane formats as unsupportedAndres Calderon Jaramillo1-0/+3
2023-04-13r600: fix typosHarri Nieminen1-6/+6
2022-12-02r600: Use get_first_non_void_channel more oftenKonstantin Seurer1-5/+1
2022-07-27gallium/radeon: require radeon DRM 2.45.0 from April 2016Marek Olšák1-4/+2
2022-05-13amd: change chip_class naming to "enum amd_gfx_level gfx_level"Marek Olšák1-22/+22
2022-05-02r600: Allow eight bit, three channel formats for vertex buffersGert Wollny1-2/+2
2022-03-28r600: Update the PS state when MSAA-ness changes, too.Emma Anholt1-7/+12
2021-10-29gallium/radeon: merge BO read/write usage flags with priority flagsMarek Olšák1-22/+22
2021-06-04r600: explicitly advertise index buffer format supportErik Faye-Lund1-0/+5
2021-04-12ac/surface: change legacy_surf_level::offset to 32-bit offset_256B shifted by 8Marek Olšák1-11/+11
2021-04-06gallium/pb: change pb_buffer::alignment to alignment_log2Marek Olšák1-2/+2
2021-02-25r600: Fix typos.Vinson Lee1-1/+1
2020-12-22gallium: inline pipe_depth_state to decrease DSA state size by 4 bytesMarek Olšák1-6/+6
2020-12-22gallium: inline pipe_alpha_state to enable better DSA bitfield packingMarek Olšák1-3/+3
2020-12-05r300,r600,radeonsi: inline struct radeon_cmdbuf to remove dereferencesMarek Olšák1-19/+19
2020-09-22gallium: rename PIPE_TRANSFER_* -> PIPE_MAP_*Marek Olšák1-1/+1
2020-05-18r600: enable TEXCOORD semantic for TGSI.Dave Airlie1-11/+10
2019-07-22gallium: switch boolean -> bool at the interface definitionsIlia Mirkin1-11/+11
2019-05-02r600: reset tex array override even when no view boundDave Airlie1-11/+10
2018-09-06gallium: enable GL_AMD_depth_clamp_separate on r600, radeonsiMarek Olšák1-1/+1
2018-09-06gallium: split depth_clip into depth_clip_near & depth_clip_farMarek Olšák1-2/+2
2018-07-31gallium: add storage_sample_count parameter into is_format_supportedMarek Olšák1-0/+4
2018-07-17r600g: constify some variablesKonstantin Kharlamov1-6/+6
2018-07-16r600: fix build after the removal of RADEON_PRIO_* flagsMarek Olšák1-4/+2
2018-07-16radeonsi: merge DCC/CMASK/HTILE priority flagsMarek Olšák1-1/+1
2018-06-29gallium/util: remove dummy function util_format_is_supportedMarek Olšák1-3/+0
2018-06-19amd,radeonsi: rename radeon_winsys_cs -> radeon_cmdbufMarek Olšák1-17/+17
2018-05-10r600: fix constant buffer bounds.Dave Airlie1-1/+1
2018-03-05r600: fix color export maskRoland Scheidegger1-0/+1
2018-02-08r600: fix rendering regression on r6/7 gpusDave Airlie1-1/+6
2018-02-07r600: work out target mask at framebuffer bind.Dave Airlie1-1/+1
2018-02-07r600: work out shader export mask at shader build time (v1.1)Dave Airlie1-1/+1
2018-01-10r600: increase number of ubos by one to 14Roland Scheidegger1-0/+1
2018-01-10r600: don't emit reloc for ring buffer out into the blueRoland Scheidegger1-4/+3
2017-11-27ac: change legacy_surf_level::slice_size to dword unitsMarek Olšák1-4/+4
2017-11-15r600: set the number type correctly for float rts in cb setupRoland Scheidegger1-1/+9
2017-11-15r600: use DX10_CLAMP bit in shader setupRoland Scheidegger1-0/+9
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