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path: root/src/gallium/drivers/r600/r600_shader.c
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2013-10-13r600g: fix tgsi_op2_s with trans-only instructionsVadim Girlin1-5/+31
This fixes the issue when dst and src is the same reg and operation on one channel overwrites the source for other channels, e.g.: UMUL TEMP[2].xyz, TEMP[0].xyzz, TEMP[2].xxxx In this example the result of the operation on channel x is written in TEMP[2].x and then used as a second source operand for channels y and z instead of original value in TEMP[2].x. This patch stores the results in temp reg and moves them to dst after performing operation on all channels. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=70327 Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-10-04r600g: texture offsets for non-TXF instructionsGrigori Goronzy1-10/+10
All texture instructions can use offsets, not just TXF. Offsets into the literals array were wrong, too. Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2013-10-02r600/llvm: Adds support for MSAAVincent Lejeune1-0/+2
2013-10-02r600g/llvm: fix txq for texture bufferVincent Lejeune1-0/+1
2013-09-29r600g: move the low-level buffer functions for multiple rings to drivers/radeonMarek Olšák1-1/+1
Also slightly optimize r600_buffer_map_sync_with_rings.
2013-09-29radeonsi: move debug options to R600_DEBUGMarek Olšák1-29/+2
2013-09-29r600g: move some debug options to drivers/radeonMarek Olšák1-7/+7
2013-08-31r600g: move streamout state to drivers/radeonMarek Olšák1-8/+8
This streamout state code will be used by radeonsi. There are new structures r600_common_context and r600_common_screen. What is inherited by what is shown here: pipe_context -> r600_common_context -> r600_context pipe_screen -> r600_common_screen -> r600_screen The common structures reside in drivers/radeon. Currently they only contain enough functionality to be able to handle streamout. Eventually I'd like the whole pipe_screen implementation to be shared and some of the context stuff too. This is quite big, but most changes are because of the new structures and the fact r600_write_value is replaced by radeon_emit. Thanks to Tom Stellard for fixing the build for r600g/compute. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Tested-by: Tom Stellard <thomas.stellard@amd.com>
2013-08-30r600g: enable SB backend by defaultVadim Girlin1-1/+1
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com> Reviewed-by: Marek Olšák <maraeo@gmail.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2013-08-30r600g: fix color exports when we have no CBsVadim Girlin1-3/+4
We need to export at least one color if the shader writes it, even when nr_cbufs==0. Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-08-25r600g: Implement the new float comparison instructions for Cayman as well.Henri Verbeet1-4/+4
I assume this should have been part of commit 7727fbb7c5d64348994bce6682e681d6181a91e9. This (obviously) fixes a lot tests. Signed-off-by: Henri Verbeet <hverbeet@gmail.com> Reviewed-by: Marek Olšák <maraeo@gmail.com>
2013-08-15r600/radeonsi: implement new float comparison instructionsRoland Scheidegger1-10/+8
Also use ordered comparisons for old cmp instructions. Tested-by: Michel Dänzer <michel@daenzer.net> Reviewed-by: Tom Stellard <tom@stellard.net>
2013-08-02r600g: honour semantic index in fragment color exportsChristoph Bumiller1-5/+5
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2013-07-12tgsi: rename the TGSI fragment kill opcodesBrian Paul1-7/+7
TGSI_OPCODE_KIL and KILP had confusing names. The former was conditional kill (if any src component < 0). The later was unconditional kill. At one time KILP was supposed to work with NV-style condition codes/predicates but we never had that in TGSI. This patch renames both opcodes: TGSI_OPCODE_KIL -> KILL_IF (kill if src.xyzw < 0) TGSI_OPCODE_KILP -> KILL (unconditional kill) Note: I didn't just transpose the opcode names to help ensure that I didn't miss updating any code anywhere. I believe I've updated all the relevant code and comments but I'm not 100% sure that some drivers had this right in the first place. For example, the radeon driver might have llvm.AMDGPU.kill and llvm.AMDGPU.kilp mixed up. Driver authors should review their code. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2013-06-28r600g/compute: Move compute_shader_create() function into evergreen_compute.cTom Stellard1-32/+0
Tested-by: Aaron Watry <awatry@gmail.com>
2013-06-17gallium: replace bswap_32 calls with util_bswap32Jonathan Gray1-2/+2
byteswap.h and bswap_32 aren't portable, replace them with calls to gallium's util_bswap32 as suggested by Mark Kettenis. Lets these files build on OpenBSD. Signed-off-by: Jonathan Gray <jsg@jsg.id.au> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-05-20r600g/llvm: Fix cubearray textureSizeVincent Lejeune1-0/+1
2013-05-16r600g: fixup for MSAA texture support checkingNiels Ole Salscheider1-1/+1
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
2013-05-15r600g: cleanup MSAA texture support checkingMarek Olšák1-2/+3
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-05-10r600g: increase array size for shader inputs and outputsMarek Olšák1-0/+2
and add assertions to prevent buffer overflow. This fixes corruption of the r600_shader struct. NOTE: This is a candidate for the stable branches.
2013-05-06r600g/llvm: Don't feed LLVM output through r600_bytecode_build()Tom Stellard1-388/+13
The LLVM backend emits raw ISA now, so we can just its output unmodified.
2013-05-06r600g/llvm: Don't emit CALL_FS for vertex shadersTom Stellard1-7/+9
The LLVM backend takes care of this now.
2013-05-03r600g/sb: use hex instead of binary constantsVadim Girlin1-3/+3
This should fix build issues with GCC < 4.3 Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-05-03r600g: use old shader disassembler by defaultVadim Girlin1-13/+9
New disassembler is not completely isolated yet from further processing in r600g/sb that is not required for printing the dump, so it has higher probability to fail in case of any unexpected features in the bytecode. This patch adds "sbdisasm" flag for R600_DEBUG that allows to use new disassembler in r600g/sb for shader dumps when shader optimization is not enabled. If shader optimization is enabled, new disassembler is used by default. Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-04-30r600g: plug in optimizing backendVadim Girlin1-2/+77
Optimization is enabled with "R600_DEBUG=sb". Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-04-30r600g: mask unused source components for SAMPLEVadim Girlin1-0/+20
This results in more clean shader code and may improve the quality of optimized code produced by r600-sb due to eliminated false dependencies in some cases. Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-04-30r600g/llvm: Fix opencl buildVincent Lejeune1-1/+1
2013-04-30r600g/llvm: get use_kill from compiler shaderVincent Lejeune1-1/+5
2013-04-24r600g/llvm: Pass struct r600_bytecode to r600_llvm_compileTom Stellard1-2/+2
This way we don't need to update the function signature everytime we emit a new config value. This also fixes the build with --enable-opencl.
2013-04-23r600/llvm: Read stacksize from config headerVincent Lejeune1-2/+1
2013-04-23/bin/bash: q : commande introuvableVincent Lejeune1-1/+1
2013-04-18r600g: Fix build with --enable-openclTom Stellard1-1/+2
2013-04-17r600g/llvm: Use gprcount from llvmVincent Lejeune1-1/+1
2013-04-17gallium: Disambiguate TGSI_OPCODE_IF.José Fonseca1-8/+15
TGSI_OPCODE_IF condition had two possible interpretations: - src.x != 0.0f - Mesa statetracker when PIPE_SHADER_CAP_INTEGERS was false either for vertex and fragment shaders - gallivm/llvmpipe - postprocess - vl state tracker - vega state tracker - most old drivers - old internal state trackers - many graw examples - src.x != 0U - Mesa statetracker when PIPE_SHADER_CAP_INTEGERS was true for both vertex and fragment shaders - tgsi_exec/softpipe - r600 - radeonsi - nv50 And drivers that use draw module also were a mess (because Mesa would emit float IFs, but draw module supports native integers so it would interpret IF arg as integers...) This sort of works if the source argument is limited to float +0.0f or +1.0f, integer 0, but would fail if source is float -0.0f, or integer in the float NaN range. It could also fail if source is integer 1, and hardware flushes denormalized numbers to zero. But with this change there are now two opcodes, IF and UIF, with clear meaning. Drivers that do not support native integers do not need to worry about UIF. However, for backwards compatibility with old state trackers and examples, it is advisable that native integer capable drivers also support the float IF opcode. I tried to implement this for r600 and radeonsi based on the surrounding code. I couldn't do this for nouveau, so I just shunted IF/UIF together, which matches the current behavior. Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Marek Olšák <maraeo@gmail.com> v2: - Incorporate Roland's feedback. - Fix r600_shader.c merge conflict. - Fix typo in radeon, spotted by Michel Dänzer. - Incorporte Christoph Bumiller's patch to handle TGSI_OPCODE_IF(float) properly in nv50/ir.
2013-04-17gallium: Eliminate TGSI_OPCODE_IFC.José Fonseca1-3/+6
Never used or implemented. Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2013-04-16r600g: Workaround for a harware bug with nested loops on CaymanMartin Andersson1-3/+15
There is a hardware bug on Cayman where a BREAK/CONTINUE followed by LOOP_STARTxxx for nested loops may put the branch stack into a state such that ALU_PUSH_BEFORE doesn't work as expected. Workaround this by replacing the ALU_PUSH_BEFORE with a PUSH + ALU Fixes piglit tests EXT_transform_feedback/order* v2: Use existing loop count and improve comment v3: [Vadim Girlin] Set jump address for PUSH instructions NOTE: This is a candidate for the 9.1 branch Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-04-11r600g: fix two issues in compressed msaa reading codeDave Airlie1-2/+2
I've no idea when sample_chan would ever be 4 here, but 4 is most definitely wrong, array textures have it as 3 as well. Also the cayman code though unused is obviously wrong. Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-04-09r600g: Fix UMAD on CaymanMartin Andersson1-13/+32
The multiplication part of tgsi_umad did not work on Cayman, because it did not populate the correct vector slots. This fixed hardlocks in the EXT_transform_feedback/order tests. NOTE: This is a candidate for the stable branches. (might not be easy to cherry-pick though) Signed-off-by: Marek Olšák <maraeo@gmail.com>
2013-04-04r600g/llvm: Workaround for wrong tex.offset_*Vincent Lejeune1-0/+3
2013-04-03r600g/llvm: Do not change cf_alu inst when adding alusVincent Lejeune1-7/+2
2013-04-02r600g: don't reserve more stack space than required v5Vadim Girlin1-44/+87
Reduced stack size allows to run more threads in some cases, improving performance for the shaders that use stack (that is, for the shaders with control flow instructions). E.g. with unigine-based apps. v4: implement exact computation taking into account wavefront size v5: add cases for RV620, RS880 Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-04-02r600g: fix range handling for tgsi input declarations v2Vadim Girlin1-3/+7
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-04-01r600g/llvm: Use stack_size provided from llvm.Vincent Lejeune1-0/+1
2013-04-01r600g/llvm: Add support for cf_alu native encodeVincent Lejeune1-0/+14
2013-03-31r600g/llvm: use native encode for texVincent Lejeune1-23/+27
2013-03-11r600g/llvm: Fix buildTom Stellard1-1/+1
2013-03-11r600g: atomize vertex shaderMarek Olšák1-0/+1
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2013-03-11r600g: inline r600_pipe_shader functionMarek Olšák1-48/+41
also change names of other functions, so that they make sense Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2013-03-11r600g: use a single env var R600_DEBUG, disable bytecode dumpingMarek Olšák1-25/+37
Only the disassembler is used to dump shaders. Here's a few examples how to use R600_DEBUG. Log compute info: R600_DEBUG=compute Dump all shaders: R600_DEBUG=fs,vs,gs,ps,cs Dump pixel shaders only: R600_DEBUG=ps Disable Hyper-Z: R600_DEBUG=nohyperz Disable the LLVM backend: R600_DEBUG=nollvm Or use any combination of the above, or print all options: R600_DEBUG=help Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2013-02-18r600g/llvm: Fix alpha_to_one piglit testsVincent Lejeune1-0/+1
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
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