| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2017-06-25 | nv50/ir: Properly fold constants in SPLIT operation | Pierre Moreau | 1 | -3/+4 |
| 2017-03-31 | nv50/ir: also do PostRaLoadPropagation for FMA | Karol Herbst | 1 | -0/+1 |
| 2017-03-31 | gm107/ir: add LIMM form of mad | Karol Herbst | 1 | -2/+1 |
| 2017-03-31 | gk110/ir: add LIMM form of mad | Karol Herbst | 1 | -1/+1 |
| 2017-03-31 | nv50/ir: implement mad post ra folding for nvc0+ | Karol Herbst | 1 | -4/+47 |
| 2017-03-31 | nv50/ir: restructure and rename postraconstantfolding pass | Karol Herbst | 1 | -58/+63 |
| 2017-03-31 | nvc0/ir: also do ConstantFolding for FMA | Karol Herbst | 1 | -0/+1 |
| 2017-03-09 | nv50/ir: check for origin insn in findOriginForTestWithZero | Pierre Moreau | 1 | -0/+2 |
| 2017-02-11 | nv50/ir: convert an ATOM.EXCH without a destination into a store | Ilia Mirkin | 1 | -0/+5 |
| 2017-02-09 | nvc0/ir: add support for all the new int64 tgsi opcodes | Ilia Mirkin | 1 | -1/+5 |
| 2017-02-09 | nv50/ir: Split 64-bit integer MAD/MUL operations | Pierre Moreau | 1 | -0/+116 |
| 2017-01-23 | nvc0: add support for MUL_ZERO_WINS property | Ilia Mirkin | 1 | -0/+1 |
| 2017-01-16 | nv50/ir: optimize shl + and | Ilia Mirkin | 1 | -0/+11 |
| 2016-10-25 | nv50/ir: start LocalCSE with getFirst to merge PHI instructions | Karol Herbst | 1 | -1/+1 |
| 2016-10-22 | nv50/ir: it appears that OP_DISCARD can't take a join modifier | Ilia Mirkin | 1 | -0/+1 |
| 2016-10-14 | nv50/ir: constant fold OP_SPLIT | Tobias Klausmann | 1 | -0/+18 |
| 2016-10-13 | nvc0/ir: be more careful about preserving modifiers in SHLADD creation | Ilia Mirkin | 1 | -7/+5 |
| 2016-10-12 | nv50/ir: optimize ADD(SHL(a, b), c) to SHLADD(a, b, c) | Samuel Pitoiset | 1 | -0/+87 |
| 2016-10-07 | nv50/ir: fix wrong check when optimizing MAD to SHLADD | Samuel Pitoiset | 1 | -1/+1 |
| 2016-10-06 | nv50/ir: optimize sub(a, 0) to a | Karol Herbst | 1 | -0/+3 |
| 2016-09-29 | nv50/ir: optimize SHLADD(a, b, c) to MOV((a << b) + c) | Samuel Pitoiset | 1 | -0/+3 |
| 2016-09-29 | nv50/ir: optimize SHLADD(a, b, 0x0) to SHL(a, b) | Samuel Pitoiset | 1 | -0/+8 |
| 2016-09-29 | nv50/ir: optimize IMAD to SHLADD in presence of power of 2 | Samuel Pitoiset | 1 | -0/+7 |
| 2016-09-18 | nv50/ir: optimize SUB(a, b) to MOV(a - b) | Samuel Pitoiset | 1 | -0/+10 |
| 2016-07-22 | nv50/ir: allow to swap sources for OP_SUB | Samuel Pitoiset | 1 | -1/+6 |
| 2016-07-16 | nv50: fix alphatest for non-blendable formats | Ilia Mirkin | 1 | -0/+4 |
| 2016-05-26 | nvc0/ir: handle a load's reg result not being used for locked variants | Ilia Mirkin | 1 | -2/+8 |
| 2016-05-17 | Treewide: Remove Elements() macro | Jan Vesely | 1 | -1/+1 |
| 2016-04-25 | nouveau: codegen: combineLd/St do not combine indirect loads | Hans de Goede | 1 | -0/+7 |
| 2016-04-07 | nv50/ir: do not try to attach JOIN ops to ATOM | Samuel Pitoiset | 1 | -1/+1 |
| 2016-03-13 | nv50/ir: avoid folding mul + add if the mul has a dnz | Ilia Mirkin | 1 | -3/+2 |
| 2016-02-16 | nv50/ir: we can't do the add to mad conversion when the mul saturates | Karol Herbst | 1 | -0/+3 |
| 2016-02-16 | nv50/ir: optimize neg(and(set, 1)) to set | Karol Herbst | 1 | -0/+32 |
| 2016-01-30 | nv50/ir: get rid of memory stores with nop values | Ilia Mirkin | 1 | -0/+6 |
| 2016-01-30 | nv50/ir: fix false global CSE on instructions with multiple defs | Ilia Mirkin | 1 | -0/+2 |
| 2016-01-29 | nv50/ir: add support for BUFFER accesses | Ilia Mirkin | 1 | -1/+1 |
| 2016-01-28 | nv50/ir: optimize mad/fma with third argument 0 to mul | Karol Herbst | 1 | -0/+21 |
| 2016-01-28 | nv50/ir: run DCE backwards | Karol Herbst | 1 | -3/+3 |
| 2016-01-28 | nv50/ir: optimize shl(shr(a, c), c) to and(a, ~((1 << c) - 1)) | Karol Herbst | 1 | -0/+8 |
| 2016-01-20 | nv50/ir: don't flip SHL(ADD) into ADD(SHL) if ADD sources have modifiers | Ilia Mirkin | 1 | -0/+2 |
| 2016-01-18 | nv50/ir: swap the least-ref'd source into src1 when both const/imm | Ilia Mirkin | 1 | -10/+15 |
| 2015-12-30 | nv50/ir: attempt to do more constant folding on mad -> add conversion | Ilia Mirkin | 1 | -11/+10 |
| 2015-12-29 | nv50/ir: float(s32 & 0xff) = float(u8), not s8 | Ilia Mirkin | 1 | -0/+3 |
| 2015-12-12 | nv50/ir: combine sequences of conversions | Ilia Mirkin | 1 | -0/+43 |
| 2015-12-12 | nv50/ir: teach post-ra immediate folding into mad about integers | Ilia Mirkin | 1 | -3/+31 |
| 2015-12-12 | nv50/ir: add short imad support | Ilia Mirkin | 1 | -2/+4 |
| 2015-12-12 | nv50/ir: can't have predication and immediates | Ilia Mirkin | 1 | -0/+3 |
| 2015-12-12 | nv50/ir: fix assumption that prog->maxGPR is in 32-bit reg units | Ilia Mirkin | 1 | -3/+20 |
| 2015-12-08 | nv50/ir: check if the target supports the new offset before inlining | Ilia Mirkin | 1 | -3/+6 |
| 2015-12-07 | nvc0/ir: fix up mul+add -> mad algebraic opt, enable for integers | Ilia Mirkin | 1 | -5/+11 |
