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2024-03-12nir/opt_shrink_vectors: shrink some intrinsics from startAlyssa Rosenzweig1-1/+1
If the backend supports it, intrinsics with a component() are straightforward to shrink from the start. Notably helps vectorized I/O. v2: add an option for this and enable only on grown up backends, because some backends ignore the component() parameter. RADV GFX11: Totals from 921 (1.16% of 79439) affected shaders: Instrs: 616558 -> 615529 (-0.17%); split: -0.30%, +0.14% CodeSize: 3099864 -> 3095632 (-0.14%); split: -0.25%, +0.11% Latency: 2177075 -> 2160966 (-0.74%); split: -0.79%, +0.05% InvThroughput: 299997 -> 298664 (-0.44%); split: -0.47%, +0.02% VClause: 16343 -> 16395 (+0.32%); split: -0.01%, +0.32% SClause: 10715 -> 10714 (-0.01%) Copies: 24736 -> 24701 (-0.14%); split: -0.37%, +0.23% PreVGPRs: 30179 -> 30173 (-0.02%) VALU: 353472 -> 353439 (-0.01%); split: -0.03%, +0.02% SALU: 40323 -> 40322 (-0.00%) VMEM: 25353 -> 25352 (-0.00%) AGX: total instructions in shared programs: 2038217 -> 2038049 (<.01%) instructions in affected programs: 10249 -> 10081 (-1.64%) total alu in shared programs: 1593094 -> 1592939 (<.01%) alu in affected programs: 7145 -> 6990 (-2.17%) total fscib in shared programs: 1589254 -> 1589102 (<.01%) fscib in affected programs: 7217 -> 7065 (-2.11%) total bytes in shared programs: 13975666 -> 13974722 (<.01%) bytes in affected programs: 65942 -> 64998 (-1.43%) total regs in shared programs: 592758 -> 591187 (-0.27%) regs in affected programs: 6936 -> 5365 (-22.65%) Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> (v1) Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28004>
2024-03-04ci/deqp: use the proper gl/gles releases for deqp-gl*, deqp-gles*, deqp-eglEric Engestrom1-2/+2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27473>
2024-02-29i915: Fix value returned for PIPE_CAP_MAX_TEXTURE_CUBE_LEVELSIan Romanick1-1/+1
Found by inspection. Original code was returning the size instead of the number of levels. This was probably an over zealous search-and-replace when PIPE_CAP_MAX_TEXTURE_2D_LEVELS was changed to _SIZE. Reviewed-by: David Heidelberg <david.heidelberg@collabora.com> Fixes: 0c31fe9ee74 ("gallium: Redefine the max texture 2d cap from _LEVELS to _SIZE.") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27800>
2024-02-07gallium: remove take_ownership from set_vertex_buffers, assume it's trueMarek Olšák1-2/+1
This removes the take_ownership parameter and defines the behavior as if take_ownership was always true, which is the fast path. This way, we don't have to have 2 codepaths in set_vertex_buffers of every driver. The old behavior is optionally available through util_set_vertex_buffers. It also documents a new constraint that count in set_vertex_buffers must be equal to the number of vertex buffers referenced by vertex elements or 0. Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27492>
2024-01-22nir: rework and fix rotate loweringKarol Herbst1-2/+0
No driver supports urol/uror on all bit sizes. Intel gen11+ only for 16 and 32 bit, Nvidia GV100+ only for 32 bit. Etnaviv can support it on 8, 16 and 32 bit. Also turn the `lower` into a `has` option as only two drivers actually support `uror` and `urol` at this momemt. Fixes crashes with CL integer_rotate on iris and nouveau since we emit urol for `rotate`. v2: always lower 64 bit Fixes: fe0965afa6b ("spirv: Don't use libclc for rotate") Signed-off-by: Karol Herbst <kherbst@redhat.com> Reviewed-by (Intel and nir): Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: David Heidelberg <david.heidelberg@collabora.com> Acked-by: Yonggang Luo <luoyonggang@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27090>
2024-01-14gallium: remove unbind_trailing_count from set_vertex_buffersMarek Olšák2-5/+5
It should implicitly unbind all bound buffers after "count". This also slightly simplies u_vbuf. This is a cleanup suggested by: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8142 Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> (asahi & panfrost) Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26309>
2024-01-03nir: remove redundant passes from nir_opt_if()Daniel Schürmann1-3/+1
These are now covered by nir_opt_loop(): - opt_if_loop_last_continue() - opt_merge_breaks() - opt_if_loop_terminator() Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24940>
2024-01-03treewide: replace calls to nir_opt_trivial_continues() with nir_opt_loop()Daniel Schürmann1-1/+1
Totals from 850 (1.11% of 76636) affected shaders: (RADV, GFX11) MaxWaves: 18134 -> 18130 (-0.02%) Instrs: 3011298 -> 3008585 (-0.09%); split: -0.17%, +0.08% CodeSize: 15836804 -> 15841972 (+0.03%); split: -0.09%, +0.12% VGPRs: 63580 -> 63604 (+0.04%) SpillSGPRs: 966 -> 1148 (+18.84%); split: -0.83%, +19.67% Latency: 36102291 -> 30186144 (-16.39%); split: -16.41%, +0.02% InvThroughput: 9058100 -> 7011821 (-22.59%); split: -22.61%, +0.02% VClause: 65369 -> 65364 (-0.01%); split: -0.03%, +0.02% SClause: 100309 -> 100305 (-0.00%); split: -0.04%, +0.04% Copies: 335658 -> 336472 (+0.24%); split: -0.70%, +0.94% Branches: 110806 -> 108945 (-1.68%); split: -1.94%, +0.26% PreSGPRs: 73476 -> 73934 (+0.62%); split: -0.25%, +0.87% PreVGPRs: 58809 -> 58840 (+0.05%); split: -0.01%, +0.06% Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24940>
2023-12-14i915G: show correct number of needed ALU instructions at errmessGKraats2-6/+4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26340>
2023-11-20ci/piglit: specify only the traces file in the job configEric Engestrom1-1/+1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26278>
2023-10-24glsl: Retire dround lowering.Eric Anholt1-1/+0
We have competent lowering in NIR already available. Drivers exposing CAP_DOUBLES but not SHADER_CAP_DROUND: - d3d12 (NIR lowers ~0 if the underlying impl doesn't do floats) - svga (Now sets the NIR lowering options) - softpipe (Doesn't do GL4 so you can't use doubles anyway) - llvmpipe (Lowers dround_even in NIR and passees the rest through successfully) - zink (NIR lowers ~0 if the underlying impl doesn't do floats, otherwise passes things through successfully, except needed dround_even lowering to avoid lavapipe regression with native doubles) - r600 (sets NIR rounding lowering flags, and lowers all fsign) Reviewed-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25777>
2023-10-18i915: Make I915_DEBUG=fs log shaders that fail to link due to CF.Emma Anholt1-1/+6
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24763>
2023-10-09i915: Use nir_group_loads() to reduce texture indirection phases.Emma Anholt1-0/+5
total instructions in shared programs: 467049 -> 467040 (<.01%) instructions in affected programs: 573 -> 564 (-1.57%) total tex_indirect in shared programs: 14133 -> 14019 (-0.81%) tex_indirect in affected programs: 491 -> 377 (-23.22%) total temps in shared programs: 28543 -> 29178 (2.22%) temps in affected programs: 3307 -> 3942 (19.20%) LOST: 0 GAINED: 65 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>
2023-10-09i915: Make exceeding tex indirect count fatal.Emma Anholt1-2/+3
The HW should fail to run shaders that have too many phases, so do this so that we get link failures. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>
2023-10-09i915: Do a test compile at glLinkShader() time.Emma Anholt4-10/+53
This lets us throw errors back to the app for shaders that are too complex. The X server would really like to have this instead of guessing based on renderer strings when shaders might be too complicated. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>
2023-10-09i915: Save fragment program compile error messages in the fragment shader.Emma Anholt4-16/+22
We'll want this for doing linking failure messages for shaders that are too long. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>
2023-10-09i915: Don't log I915_DEBUG=fs output for blit shaders.Emma Anholt3-2/+11
Unless you have NIR_DEBUG=print_internal, the rest of the shader debug pipeline is also hidden. Cleans up output when looking at shader-db compiles. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>
2023-10-09i915: Print the relevant counts vs limits when throwing errors.Emma Anholt1-8/+16
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>
2023-10-09i915: Re-clang-format and enforce it in CI.Emma Anholt8-68/+57
I want to be able to mash the format button at any point when hacking on this thing instead of doing bespoke whitespace. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>
2023-08-22nir: unify lower_bitfield_extract with has_bfeGeorg Lehmann1-1/+1
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
2023-08-22nir: unify lower_bitfield_insert with has_{bfm,bfi,bitfield_select}Georg Lehmann1-1/+1
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
2023-08-13clang-format: Disable formatting by defaultKonstantin Seurer1-0/+1
This should make `git clang-format` usable for patches that modify clang formatted and manually formatted code. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9492 Reviewed-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24645>
2023-08-11gallium: remove start_slot parameter from pipe_context::set_vertex_buffersYogesh Mohan Marimuthu1-3/+3
This patch removes start_slot from set_vertex_buffers() as suggested in https://gitlab.freedesktop.org/mesa/mesa/-/issues/8142 compilation testing: all gallium drivers, nine frontend compilation has been tested. d3d10umd compilation has not been tested driver, frontend testing: only llvmpipe and radeonsi driver was tested running game only the nine frontend changes are complex. All other changes are easy. nine front end was using start slot and also using multi context. nine frontend code changes: In update_vertex_elements() and update_vertex_buffers(), the vertex buffers or streams are ordered removing the holes. In update_vertex_elements() the vertex_buffer_index is updated for pipe driver to match the ordered list. v2: remove start_slot usage code from Marek (Marek Olšák) v3: nine stream number holes mask code from Axel (Axel Davy) Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> (except nine, which is Ab) Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22436>
2023-07-25i915: change format in dbg stringIllia Abernikhin1-1/+1
Actually, uintptr_t is of type unsigned long, but the debug line uses the %d format specifier, which expects an int. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: Illia Abernikhin <illia.abernikhin@globallogic.com> Found by Coverity. CID: 1515961 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20893>
2023-06-28draw/i915: move hwfmt array to i915 specific structErik Faye-Lund5-17/+20
There's no point in bloating the vertex_info struct everywhere with information that's only used by i915 in a single place. Let's explicitly store the hwinfo when needed, instead of piggy-backing on vertex_info. Reviewed-by: Emma Anholt <emma@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23851>
2023-06-27util: include "util/compiler.h" instead of "pipe/p_compiler.h"Yonggang Luo3-3/+3
And pipe/p_compiler.h are removed as it not used any more Signed-off-by: Yonggang Luo <luoyonggang@gmail.com> Acked-by: David Heidelberg <david.heidelberg@collabora.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27treewide: Replace the usage of ubyte/ushort with uint8_t/uint16_tYonggang Luo6-15/+15
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com> Acked-by: David Heidelberg <david.heidelberg@collabora.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27treewide: Replace the usage of TRUE/FALSE with true/falseYonggang Luo1-2/+2
this is a separate patch as it's won't affect the code style Signed-off-by: Yonggang Luo <luoyonggang@gmail.com> Acked-by: David Heidelberg <david.heidelberg@collabora.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27treewide: replace usage of boolean to boolYonggang Luo1-1/+1
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com> Acked-by: David Heidelberg <david.heidelberg@collabora.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-13treewide: Remove use_scoped_barrierAlyssa Rosenzweig1-1/+0
It is now set by all relevant drivers and not checked anywhere. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Acked-by: Caio Oliveira <caio.oliveira@intel.com> Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13ntt: Use scoped barriersAlyssa Rosenzweig1-0/+1
In addition to bringing us one backend closer to the scoped-only future, this improves the generated code in cases like: memoryBarrierBuffer(); memoryBarrierShared(); controlBarrier(); With scoped_barriers + nir_opt_combine_barriers, we now emit only one MEMBAR instruction (and a BARRIER) rather than two MEMBARs. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-12gallium: Drop PIPE_SHADER_CAP_PREFERRED_IR.Emma Anholt1-2/+0
Now everyone's saying NIR, and doing any NTT internally. The only returns of TGSI were in gallivm_get_shader_param() and tgsi_exec_get_shader_param(), but the drivers were returning NIR instead of calling down to them. Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Acked-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-07treewide: use uint64_t / (u)intptr_t in image address calculationsMarek Olšák2-2/+2
16K * 16K * 16bpp = 4G, which overflows int32, so layer_stride needs to have 64 bits. More generally, any "byte_stride * height" computation can overflow int32. Use (u)intptr_t in some gallium and st/mesa places where we do CPU access. Use uint64_t otherwise. Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23389>
2023-06-03compiler: Rename shader_prim to mesa_prim and replace all usage of ↵Yonggang Luo1-26/+26
pipe_prim_type with mesa_prim This is a prepare step to remove depends on p_defines.h in src/util/* This is done by: replace pipe_prim_type with mesa_prim replace shader_prim with mesa_prim replace PIPE_PRIM_MAX with MESA_PRIM_COUNT replace SHADER_PRIM_ with MESA_PRIM_ replace PIPE_PRIM_ with MESA_PRIM_ This patch only replace code only Signed-off-by: Yonggang Luo <luoyonggang@gmail.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23369>
2023-05-29i915: Use the Mesa base styleKonstantin Seurer1-113/+2
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Eric Engestrom <eric@engestrom.ch> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23275>
2023-05-25i915: remove unused tgsi includesThomas H.P. Andersen1-1/+0
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
2023-05-03i915: use util_unreference_framebuffer_state to unref fb stateMike Blumenkrantz1-4/+1
Fixes: f5bde99cbdd ("gallium: plumb resolve attachments through from frontends -> pipe_framebuffer_state") Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Emma Anholt <emma@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22673>
2023-05-03i915: use util_copy_framebuffer_state to set fb stateMike Blumenkrantz1-9/+2
Fixes: f5bde99cbdd ("gallium: plumb resolve attachments through from frontends -> pipe_framebuffer_state") Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Emma Anholt <emma@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22673>
2023-04-25ci: Move some timeout xfails to skips.Emma Anholt1-1/+0
We generally don't want to wait around for a minute for things to fail. Note that some of these were already in their skips. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22495>
2023-04-06glsl: Drop PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED.Emma Anholt1-1/+0
All drivers should now be using the appropriate NIR lowering, so we can drop this pile of code. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06glsl: Retire ldexp lowering in favor of the nir lowering flag.Emma Anholt1-1/+0
Compilers need to set the nir flag anyway for vulkan, so just pass ldexp through to NIR and let that handle it. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-03-31i915: Add support for `get_screen_fd`Lucas Fryzek2-0/+14
Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21654>
2023-02-10ci: Disable systems in my farm that haven't recovered.Emma Anholt1-2/+3
We lost power in a storm, and these ones didn't come back afterwards. I suspect I need a new PSU. And maybe some surge protection for the future. :( I've left the CI code in place for some day when I hopefully swap out the power supplies. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21205>
2023-01-28gallium/draw: Enable aapoint NIR helpers to generate bool1, bool32, or ↵Ian Romanick2-6/+3
float32 Booleans Fixes arb_point_parameters-point-attenuation on G33. The crash in point-line-no-cull is fixed, but the test still fails. Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20869>
2023-01-26ci: Add manual rules variations to disable irrelevant driver jobs.Emma Anholt1-2/+1
If you're only affecting one or a couple of drivers, it would be nice if your pipeline buttons on the web UI weren't full of manual run buttons for all the other drivers. This is a bunch of duplicated lines, but less than it could have been now that we have !references. In some of these cases (i915g, nouveau, etnaviv), we have no non-manual jobs for those drivers, so I could have just rewritten the original "driver-rules" to "driver-manual-rules". I decided to keep things consistent between drivers, though, because this is all esoteric enough to readers already without making different drivers' rules look different. Fixes: #4891 Acked-by: David Heidelberg <david.heidelberg@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17445>
2023-01-24ci/piglit: Exclude swapbuffers front-readback tests with PIGLIT_PLATFORM=gbm.Emma Anholt1-2/+0
These are expected to fail by the design of gbm. Don't make each driver track them. Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Acked-by: Karol Herbst <kherbst@redhat.com> Acked-by: Martin Roukala <martin.roukala@mupuf.org> Acked-by: David Heidelberg <david.heidelberg@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>
2023-01-24ci: Move PIGLIT_PLATFORM settings out of the .tomls.Emma Anholt2-2/+1
I'm going to add some automatic platform-based skips lists shortly (like all-skips but more targeted), and this avoids needing to add them to each .toml. Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Acked-by: Karol Herbst <kherbst@redhat.com> Acked-by: Martin Roukala <martin.roukala@mupuf.org> Acked-by: David Heidelberg <david.heidelberg@collabora.com> Acked-by: Erico Nunes <nunes.erico@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>
2023-01-12i915: Enable generation of fcsel_gt and fcsel_ge opcodesIan Romanick1-0/+1
DX9 PS 1.x / GL_ARB_fragment_program shaders that have been converted to GLSL are littered with patterns like ps_r1.x = ((ps_t0.y >= 0.0) ? ps_r1.x : ps_c1.y); This is because CMP is a fundamental opcode in those earlier shading languages. i915 supports this opcode natively, but there's no way to get it directly into the backend. Instead, NIR and NTT generate some combination of fcsel and sge and hope for the best. i915 total instructions in shared programs: 49032 -> 48897 (-0.28%) instructions in affected programs: 4173 -> 4038 (-3.24%) helped: 39 HURT: 0 total temps in shared programs: 2795 -> 2790 (-0.18%) temps in affected programs: 22 -> 17 (-22.73%) helped: 5 HURT: 0 total const in shared programs: 4976 -> 4967 (-0.18%) const in affected programs: 203 -> 194 (-4.43%) helped: 9 HURT: 0 GAINED: shaders/trine/fp-13.shader_test FS Reviewed-by: Emma Anholt <emma@anholt.net> Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20162>
2022-12-05ci/i915: Update xfails.Emma Anholt1-3/+14
Some things have drifted since we were last green. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20166>
2022-11-23i915g: fix typo in #ifEric Engestrom1-2/+2
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19963>