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2017-05-10gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEXMarek Olšák1-0/+2
The next patch will use it. This is really for svga and GL2-level drivers. Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2017-05-10gallium: remove pipe_index_buffer and set_index_bufferMarek Olšák1-4/+2
pipe_draw_info::indexed is replaced with index_size. index_size == 0 means non-indexed. Instead of pipe_index_buffer::offset, pipe_draw_info::start is used. For indexed indirect draws, pipe_draw_info::start is added to the indirect start. This is the only case when "start" affects indirect draws. pipe_draw_info::index is a union. Use either index::resource or index::user depending on the value of pipe_draw_info::has_user_indices. v2: fixes for nine, svga
2017-05-10gallium: separate indirect stuff from pipe_draw_info - 80 -> 56 bytesMarek Olšák1-1/+1
For faster initialization of non-indirect draws.
2017-04-26gallium: add PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERSSamuel Pitoiset1-0/+3
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-14tgsi: clarify TGSI_SEMANTIC_{LAYER,VIEWPORT_INDEX}Nicolai Hähnle1-0/+10
Depending on pipe caps they can be writable in all vertex processing stages, but only the output of the last stage counts. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-04-14gallium: add PIPE_CAP_TGSI_TES_LAYER_VIEWPORTNicolai Hähnle1-0/+3
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-04-14swr: update gallium driver docsTim Rowley2-6/+12
v2: add back scons section, mention additional built swr libraries Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-04-14gallium/docs: small correction about register files for atomicsRob Clark1-2/+4
These can operate on MEMORY[], in addition to BUFFER[] and IMAGE[] Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-04-07gallium: fix some math formulas to display betterIlia Mirkin1-16/+16
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-04-05tgsi: add SUBGROUP_* semanticsIlia Mirkin1-0/+51
v2: add documentation (Nicolai) Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05tgsi: add BALLOT/READ_* opcodesIlia Mirkin1-11/+57
v2 (Nicolai): - BALLOT isn't per-channel - expand the documentation (also for VOTE_*) v3: - only BALLOT returns a 64-bit lanemask (Boyan) - relax the requirement on READ_INVOC: the invocation number to read from must be uniform within a sub-group. This matches the GL_ARB_shader_ballot spect (and the v_readlane instruction of AMD GCN) v4: - hopefully really fix the doc of VOTE_* returns (Ilia) Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
2017-04-05gallium: add PIPE_CAP_TGSI_BALLOTNicolai Hähnle1-0/+2
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05gallium: add sparse buffer interface and capabilityNicolai Hähnle2-0/+28
v2: - explain the resource_commit interface in more detail Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-01gallium/docs: remove documentation of removed argErik Faye-Lund1-2/+0
geom was removed in e968975 ("gallium: remove the geom_flags param from is_format_supported", Tue Mar 8 00:01:58 2011 +0100), but the documentation of it was left over. Let's bring the documentation up to date. Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-31gallium: Add a cap to check if the driver supports fill_rectangleLyude1-0/+4
Changes since v1: - Add pipe caps for etnaviv, freedreno, swr and virgl Signed-off-by: Lyude <lyude@redhat.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-04-01gallium: remove support for predicates from TGSI (v2)Marek Olšák1-1/+0
Neved used. v2: gallivm: rename "pred" -> "exec_mask" etnaviv: remove the cap gallium: fix tgsi_instruction::Padding Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-03-31tgsi: add CLOCK opcodeIlia Mirkin1-0/+14
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-03-31gallium: add PIPE_CAP_TGSI CLOCKNicolai Hähnle1-0/+1
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-03-15gallium/tgsi: Treat UCMP sources as floats to match the GLSL-to-TGSI pass ↵Francisco Jerez1-3/+5
expectations. Currently the GLSL-to-TGSI translation pass assumes it can use floating point source modifiers on the UCMP instruction. See the bug report linked below for an example where an unrelated change in the GLSL built-in lowering code for atan2 (e9ffd12827ac11a2d2002a42fa8eb1) caused the generation of floating-point ir_unop_neg instructions followed by ir_triop_csel, which is translated into UCMP with a negate modifier on back-ends with native integer support. Allowing floating-point source modifiers on an integer instruction seems like rather dubious design for a transport IR, since the same semantics could be represented as a sequence of MOV+UCMP instructions instead, but supposedly this matches the expectations of TGSI back-ends other than tgsi_exec, and the expectations of the DX10 API. I take no responsibility for future headaches caused by this inconsistency. Fixes a regression of piglit glsl-fs-tan-1 on softpipe introduced by the above-mentioned glsl front-end commit. Even though the commit that triggered the regression doesn't seem to have made it to any stable branches yet, this might be worth back-porting since I don't see any reason why the bug couldn't have been reproduced before that point. Suggested-by: Roland Scheidegger <sroland@vmware.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99817 Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-03-15gallium: add TGSI opcodes TEX_LZ and TXF_LZMarek Olšák1-1/+32
for better code generation in radeonsi
2017-03-15gallium: add PIPE_CAP_TGSI_TEX_TXF_LZMarek Olšák1-0/+2
2017-02-25gallium: remove PIPE_CAP_USER_INDEX_BUFFERSMarek Olšák1-4/+0
all drivers support it Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Brian Paul <brianp@vmware.com> Tested-by: Brian Paul <brianp@vmware.com> (VMware driver only)
2017-02-23gallium: add get_disk_shader_cache() callbackTimothy Arceri1-0/+10
V2: Provide more detail in callback description and add description to screen.rst Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-22gallium/docs: use imgmath instead of pngmathEric Engestrom1-1/+1
WARNING: sphinx.ext.pngmath has been deprecated. Please use sphinx.ext.imgmath instead. Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-02-22gallium/docs: fix section title formattingEric Engestrom1-2/+2
src/gallium/docs/source/tgsi.rst:3488: WARNING: Title underline too short. Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-02-22gallium/docs: add missing newlinesEric Engestrom1-0/+33
Without these, mathjax considers these as the continuation of the previous line. Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-02-22gallium/docs: add missing math formattingEric Engestrom1-0/+4
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-02-22gallium/docs: fix sublist formattingEric Engestrom1-0/+2
src/gallium/docs/source/context.rst:95: ERROR: Unexpected indentation. Sub lists need to be surrounded by a blank line. Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-02-18gallium: remove TGSI_OPCODE_CLAMPMarek Olšák1-13/+0
Not used and not widely supported. Use MIN+MAX instead. Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-18gallium/docs: remove documentation of non-existent instructionsMarek Olšák1-26/+0
trivial
2017-02-14gallium: add common uploaders into pipe_context (v2)Marek Olšák1-0/+23
For lower memory usage and more efficient updates of the buffer residency list. (e.g. if drivers keep seeing the same buffer for many consecutive "add" calls, the calls can be turned into no-ops trivially) v2: add const_uploader, add documentation Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> Tested-by: Charmaine Lee <charmainel@vmware.com>
2017-02-09gallium: add separate PIPE_CAP_INT64_DIVMODIlia Mirkin1-0/+2
Nouveau does not currently have logic to implement this as a library function. Even though such a library could be written, there's no big advantage to do it that way for now given that int64 is a very uncommon use-case. Allow a driver to expose INT64 without supporting division and modulo operations. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-02gallium: turn PIPE_SHADER_CAP_DOUBLES into a screen capabilityNicolai Hähnle1-2/+3
Make the cap consistent with PIPE_CAP_INT64. Aside from the hypothetical case of using draw for vertex shaders (and actually caring about doubles...), every implementation supports doubles either nowhere or everywhere. Also, st/mesa didn't even check the cap correctly in all supported shader stages. While at it, add a missing LLVM version check for 64-bit integers in radeonsi. This is conservative: judging by the log, LLVM 3.8 might be sufficient, but there are probably bugs that have been fixed since then. v2: fix clover (Marek) Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-01-23gallium: add PIPE_CAP_TGSI_MUL_ZERO_WINSIlia Mirkin1-0/+2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Axel Davy <axel.davy@ens.fr>
2017-01-23gallium: add TGSI_PROPERTY_MUL_ZERO_WINSIlia Mirkin1-2/+15
This will be useful for proper D3D9 emulation, where this behavior is expected by some shaders. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Axel Davy <axel.davy@ens.fr>
2017-01-20gallium: add pipe_screen::resource_changedPhilipp Zabel1-0/+14
Add a hook to tell drivers that an imported resource may have changed and they need to update their internal derived resources. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2017-01-16gallium: add flags parameter to texture barrierIlia Mirkin1-1/+2
This is so that we can differentiate between flushing any framebuffer reading caches from regular sampler caches. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-16gallium: add PIPE_CAP_TGSI_FS_FBFETCHIlia Mirkin1-0/+2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-16gallium: add FBFETCH opcode to retrieve the current sample valueIlia Mirkin1-0/+13
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-16tgsi: add DDIV instructionNicolai Hähnle1-0/+9
Double-precision division, to allow more precision than a DRCP + DMUL sequence. Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-01-05gallium: add PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELYMarek Olšák1-0/+3
Drivers with good compilers don't need aggressive optimizations before TGSI. Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-20gallium-docs: Add documentation for when using several contextsAxel Davy1-0/+23
Add documentation to explicit what can be expected and what is allowed when using several contexts. Signed-off-by: Axel Davy <axel.davy@ens.fr> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-12-20gallium-docs: Add documentation for threading requirementsAxel Davy1-0/+10
Add documentation for the requirements related to threading for screens and contexts. Signed-off-by: Axel Davy <axel.davy@ens.fr> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-11-30gallium: add PIPE_CAP_TGSI_CAN_READ_OUTPUTSNicolai Hähnle1-0/+2
Drivers that support this benefit by saving one lowering pass in the GLSL-to-TGSI conversion. radeonsi already supports this because all outputs are stored in temporary variables before the export (except for TCS outputs, which have always been readable in TGSI anyway due to their special semantics). Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-11-15gallium: add PIPE_SHADER_CAP_LOWER_IF_THRESHOLDMarek Olšák1-0/+4
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-02tgsi: align the definition of BFI & [UI]BFE with GLSLNicolai Hähnle1-20/+15
As previously written, these opcodes use the SM5 semantics which is incompatible with GLSL when bits == 0, offset == 32. At some point we may want to add BFI_SM5 etc. opcodes, but all users currently either want (and expect!) the GLSL semantics or don't care. Bitfield inserts are generated by the GLSL lower_instructions and lower_packing_builtins passes with constant bits and offset arguments, so any workaround code that drivers may have to emit to follow GLSL semantics should be optimized away easily for those uses. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-10-22gallium: add PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERSIlia Mirkin1-0/+3
This allows the driver to signal that it can't handle random interleaving of attributes across buffers. This is required for ARB_transform_feedback3, and it's initialized to whatever the previous value of PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME was except for nv50 where it is disabled. Note that the proprietary drivers never expose ARB_transform_feedback3 on any GT21x's (where nouveau previously did), and after some effort I was unable to get it to work. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-10-12gallium: add PIPE_CAP_TGSI_ARRAY_COMPONENTSNicolai Hähnle1-0/+8
This is a screen cap because drivers are expected to support it either for all shader types or for none of them. Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-10-07gallium: add PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCKSamuel Pitoiset1-0/+4
v3: - use a new case statement in r600_pipe_common.c - fix compilation of softpipe... Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-05gallium: add pipe_context::set_device_reset_callbackNicolai Hähnle1-0/+15
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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