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path: root/src/freedreno
AgeCommit message (Expand)AuthorFilesLines
2020-02-12tu: Force sysmem with mipmapped non-aligned linear storesConnor Abbott2-1/+65
2020-02-12tu: Support input attachments with sysmemConnor Abbott1-12/+34
2020-02-12tu: Support resolve ops with sysmem renderingConnor Abbott1-12/+98
2020-02-12tu: Handle vkCmdClearAttachments() with sysmemConnor Abbott4-92/+166
2020-02-12tu: Add helper for CP_COND_REG_EXECConnor Abbott1-0/+40
2020-02-12tu: Sysmem renderingConnor Abbott3-18/+240
2020-02-12tu: Disable linear depth attachmentsConnor Abbott1-10/+44
2020-02-12tu: Support multisample image clearsConnor Abbott1-1/+6
2020-02-12tu/blit: Support blits in secondary cmdstreamsConnor Abbott7-34/+36
2020-02-12tu: Properly set UBWC flags in RB_RENDER_CNTLConnor Abbott1-5/+38
2020-02-12tu: Don't emit initial render target state in tile_load_ibConnor Abbott1-6/+13
2020-02-12turnip: Add a618 supportChad Versace1-0/+8
2020-02-12turnip: Add magic register values to tu_physical_deviceChad Versace4-6/+23
2020-02-12freedreno/a6xx: use single format enumJonathan Marek6-489/+394
2020-02-12Rename nir_lower_constant_initializers to nir_lower_variable_initalizersArcady Goldmints-Orlov1-2/+2
2020-02-07freedreno/ir3: Fold const only when the type is floatHyunjun Ko1-0/+11
2020-02-07freedreno/ir3: put the conversion back for half const to the right place.Hyunjun Ko1-6/+6
2020-02-07freedreno/ir3: Add cat4 mediump opcodesHyunjun Ko2-0/+18
2020-02-07freedreno/ir3: fold const conversion into consumerRob Clark2-1/+20
2020-02-07freedreno/ir3: fix printing half constant registers.Hyunjun Ko1-3/+4
2020-02-07freedreno/ir3: Set IR3_REG_HALF flag on src as well in immediate MOVKristian H. Kristensen1-1/+1
2020-02-07freedreno: android: fix build of perfcounters.Martin Fuzzey1-4/+4
2020-02-07freedreno: android: add a6xx-pack.xml.h generation to android buildMartin Fuzzey1-1/+6
2020-02-07freedreno: android: fix build failure on android due to python versionMartin Fuzzey1-7/+7
2020-02-05glsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.Eric Anholt4-66/+7
2020-02-05tu: Move vsc_data and vsc_data2 allocation into the deviceConnor Abbott3-36/+49
2020-02-05freedreno: Fix CP_COND_EXECConnor Abbott1-1/+1
2020-02-05freedreno: Add CP_REG_WRITE documentationConnor Abbott2-1/+33
2020-02-05freedreno: Fix CP_COND_REG_EXEC bit positionsConnor Abbott1-3/+3
2020-02-04freedreno: Allow UBWC on textures with multiple mipmap levels.Eric Anholt4-20/+22
2020-02-04freedreno: Rename the UBWC layer size field and store it as bytes.Eric Anholt6-18/+17
2020-02-04freedreno: Include the layer size in layout debug.Eric Anholt1-1/+2
2020-02-04freedreno: Move the layout debug under FD_MESA_DEBUG=layout.Eric Anholt3-22/+33
2020-02-04freedreno/perfcntrs: fix fd leakEric Engestrom1-1/+5
2020-02-04turnip: Be explicit about converting vk compare func to a6xxKristian H. Kristensen1-1/+8
2020-02-04freedreno/fdperf: Cast away some ignored return valuesKristian H. Kristensen1-4/+4
2020-02-01freedreno/ir3: fix a dirty lieRob Clark1-7/+4
2020-02-01freedreno/ir3: simplify split from collectRob Clark1-0/+10
2020-02-01freedreno/ir3: create fragcoord instructions in input blockRob Clark1-2/+2
2020-02-01freedreno/ir3: remove unused tex arg harderRob Clark3-19/+12
2020-02-01freedreno/ir3: add RA sanity checkRob Clark1-0/+33
2020-02-01freedreno/ir3: two pass register allocationRob Clark2-60/+297
2020-02-01freedreno/ir3: don't precolor unused inputsRob Clark1-1/+2
2020-02-01freedreno/ir3: add is_tex_or_prefetch()Rob Clark3-2/+7
2020-02-01freedreno/ir3: number instructions from oneRob Clark1-1/+1
2020-02-01freedreno/ir3: post-RA sched passRob Clark6-5/+679
2020-02-01freedreno/ir3: fix kill schedulingRob Clark2-1/+2
2020-02-01freedreno/ir3/ra: make use()/def() functions instead of macrosRob Clark1-15/+24
2020-02-01freedreno/ir3: a bit more optmsgs debugRob Clark1-0/+10
2020-02-01freedreno/ir3: move atomic fixup after RARob Clark3-28/+38