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AgeCommit message (Expand)AuthorFilesLines
2021-06-22nir: use a more fitting index for btd_stack_push_intelLionel Landwerlin1-1/+1
2021-06-22nir: drop the btd_resume_intel intrinsicLionel Landwerlin1-2/+0
2021-06-22spirv: Create acceleration structure and shader record variablesJason Ekstrand1-5/+2
2021-06-22spirv_to_nir: Add environment variable to change default log levelCharlie Turner2-1/+35
2021-06-21nir: Add raytracing shader call lowering pass.Bas Nieuwenhuizen4-0/+1131
2021-06-21nir: Add lowered vendor independent raytracing intrinsics.Bas Nieuwenhuizen5-5/+42
2021-06-21nir,docs: Add docs for NIR ALU instructionsJason Ekstrand1-12/+44
2021-06-21nir: Require vectorized ALU ops to be all-or-nothingJason Ekstrand1-0/+2
2021-06-21nir/propagate_invariant: add invariant_prim optionRhys Perry2-2/+26
2021-06-21nir,vc4: Suffix a bunch of unorm 4x8 opcodes _vc4Jason Ekstrand2-51/+53
2021-06-21nir,panfrost: Suffix fsat_signed and fclamp_pos with _maliJason Ekstrand1-2/+4
2021-06-21nir,amd: Suffix nir_op_cube_face_coord/index with _amdJason Ekstrand3-6/+6
2021-06-18nir: Add an interface for logging shaders with mesa_log*.Emma Anholt2-2/+23
2021-06-18nir: Do peephole select on other instructions if the limit is ~0.Eric Anholt1-3/+31
2021-06-18nir/lower_int_to_float: Make sure the cursor is in the right spot.Emma Anholt1-0/+2
2021-06-17spirv: Fix handling of OpBranchConditional with same THEN and ELSECaio Marcelo de Oliveira Filho2-23/+23
2021-06-17intel/nir: Fix txs for null surfacesIván Briano1-3/+7
2021-06-16compiler/glsl: Use mutex lock while freeing up mem_ctxMartin Krastev1-1/+10
2021-06-16shader_enums: change VERT_BIT back to the 32-bit shiftMarek Olšák1-1/+1
2021-06-15nir/cse: resize the instruction setRhys Perry1-0/+2
2021-06-15nir: use a single set during CSERhys Perry4-36/+32
2021-06-11i965: Use nir_lower_passthrough_edgeflagsJason Ekstrand1-2/+5
2021-06-11nir/edgeflags: update outputs written when lowering edge flags.Dave Airlie1-1/+2
2021-06-10nir: document that ACCESS_RESTRICT is not set at intrinsicsRhys Perry1-1/+2
2021-06-10nir/opt_load_store_vectorize: only require one variable to be restrictRhys Perry1-2/+2
2021-06-10nir/opt_load_store_vectorize: check for restrict at the variableRhys Perry1-23/+40
2021-06-10nir/load_store_vectorizer: fix check_for_robustness() with indirect loadsRhys Perry2-11/+132
2021-06-09amd: Add extra source to the mbcnt_amd NIR intrinsic.Timur Kristóf3-2/+17
2021-06-09nir: Add AMD-specific byte and lane permute intrinsics.Timur Kristóf2-0/+6
2021-06-09nir: Add nir_op_sad_u8x4 which corresponds to AMD's v_sad_u8.Timur Kristóf2-0/+21
2021-06-09nir/gather_info: Rename per_vertex to is_arrayedCaio Marcelo de Oliveira Filho1-7/+7
2021-06-09nir/lower_io: Rename vertex_index to array_index in helpersCaio Marcelo de Oliveira Filho2-43/+43
2021-06-09nir/lower_fragcolor: Avoid redundant load_outputAlyssa Rosenzweig1-1/+2
2021-06-08nir: Move workgroup_size and workgroup_variable_size into common shader_infoCaio Marcelo de Oliveira Filho10-63/+81
2021-06-08nir: Move zero_initialize_shared_memory into common shader_infoCaio Marcelo de Oliveira Filho2-3/+6
2021-06-08nir/lower_returns: Deal with single-arg phis after if.Bas Nieuwenhuizen1-0/+10
2021-06-08nir, nir/algebraic: add byte/word insertion instructionsRhys Perry3-0/+19
2021-06-08nir/algebraic: optimize extract of extractRhys Perry1-0/+6
2021-06-07nir: Rename WORK_GROUP (and similar) to WORKGROUPCaio Marcelo de Oliveira Filho13-61/+61
2021-06-07nir: Rename nir_intrinsic_load_local_group_size to nir_intrinsic_load_workgro...Caio Marcelo de Oliveira Filho5-12/+12
2021-06-07compiler: Rename SYSTEM_VALUE_LOCAL_GROUP_SIZE to SYSTEM_VALUE_WORKGROUP_SIZECaio Marcelo de Oliveira Filho6-7/+7
2021-06-07compiler: Rename local_size to workgroup_sizeCaio Marcelo de Oliveira Filho9-71/+71
2021-06-05nir: Add nir_intrinsic_load_back_face_agxAlyssa Rosenzweig1-0/+3
2021-06-04nir: define NIR_ALU_MAX_INPUTSHoe Hao Cheng1-2/+7
2021-06-04nir/unsigned_upper_bound: don't require dominance metadataRhys Perry2-11/+2
2021-05-31compiler/spirv: expand_to_vec4 -> nir_pad_vec4Mike Blumenkrantz1-20/+3
2021-05-26nir/builder: add nir_maskMike Blumenkrantz1-0/+8
2021-05-21nir/lower_io_to_vector: fix per vertex io handling for arraysTimothy Arceri1-8/+19
2021-05-21nir/lower_tex: Add support for lowering YUYV formatsIan Romanick2-0/+24
2021-05-21nir/lower_tex: Add support for lowering Y41x formatsIan Romanick2-0/+24