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path: root/src/amd/vulkan/radv_meta_buffer.c
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5 daysradv: restore invalidating the vector cache for internal meta operationsSamuel Pitoiset1-0/+1
The driver used to invalidate the vector cache for meta operations but this has been removed and I think it should be restored to fix a bunch of regressions on GFX8. This probably needs to be cleaned up but this is a hotfix. This fixes a bunch of regressions and flakes on GFX8 like dEQP-VK.pipeline.multisample.sample_locations_ext.draw.color.samples_4.*. Fixes: 8f8d72af555 ("radv: Use access helpers for flushing with meta operations.") Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8573>
11 daysradv: Use access helpers for flushing with meta operations.Bas Nieuwenhuizen1-6/+9
This way we're properly using the vulkan barrier paradigm instead of adhoc guessing what caches need to be flushed. This is more robust for cache policy changes as we now don't have to revisit all the meta operations all the time. Note that a barrier has both a src and dst part though. So barrier: flush src meta op flush dst becomes barrier: flush barrier src flush meta op dst meta op flush meta op src flush barrier dst And there are some places where we've been able to replace a CB flush with a shader flush because that is what we'd need according to vulkan rules (and it turns out that in the cases the CB flush mattered the app will set the bit in one of the relevant flushes or it was needed as a result of an optimization that we counter-acted in the previous patch.) Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7202>
2020-11-26radv: use intrinsic buildersRhys Perry1-36/+8
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-11nir/builder: Add a name format arg to nir_builder_init_simple_shader().Eric Anholt1-4/+4
This cleans up a bunch of gross sprintfs and keeps the caller from needing to remember to ralloc_strdup. I added a couple of '"%s", name ? name : ""' to radv where I didn't fully trace through whether a non-null name was being passed in. I also took the liberty of adding a basic name to a few shaders (pan_blit, unit tests) Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
2020-11-11nir/builder: Drop the mem_ctx arg from nir_builder_init_simple_shader().Eric Anholt1-2/+2
This looks a lot more simple now! Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
2020-11-11nir_builder: Return a new builder from nir_builder_init_simple_shader().Eric Anholt1-6/+2
It's a little inline function, so we can just RAII it for better ergonomics. Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
2020-09-23radv: add support for CmdCopyBuffer2KHR()Samuel Pitoiset1-16/+47
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
2020-09-21radv: add a helper for loading meta descriptorsSamuel Pitoiset1-28/+6
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6202>
2020-08-21nir: Add new system values and intrinsics for dealing with CL work offsetsJesse Natalie1-2/+2
New intrinsics are added for global invocation IDs and work group IDs to deal with offsets in both. The only one of these that needs a system value is global invocation offset, for CL's get_global_offset(). Note that CL requires very large work group sizes, so these intrinsics are modified to be able to use 64bit values, for 64bit SPIR-V. Reviewed-by: Karol Herbst <kherbst@redhat.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2019-11-25radv: set alignment for load_ssbo/store_ssbo in meta shadersRhys Perry1-0/+3
Otherwise, nir_intrinsic_align() will assert when called on the intrinsics Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-06-25radv: rename and re-document cache flush flagsSamuel Pitoiset1-2/+2
SMEM and VMEM caches are L0 on gfx10. Ported from RadeonSI. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-05-24nir/builder: Remove the use_fmov parameter from nir_swizzleJason Ekstrand1-1/+1
This flag has caused more confusion than good in most cases. You can validly use imov for floats or fmov for integers because, without source modifiers, neither modify their input in any way. Using imov for floats is more reliable so we go that direction. Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-15radv: set ACCESS_NON_READABLE on stores for copy/fill/clear meta shadersSamuel Pitoiset1-0/+2
The compiler will emit GLC=1. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-03-06radv: set num_components on vulkan_resource_index intrinsicLionel Landwerlin1-3/+6
In 61e009d2c4e4df we changed the number of components in the vulkan_resource_index intrinsic and forgot the update Radv's code for it. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 61e009d2c4e4df ("spirv: Use the same types for resource indices as pointers") Reviewed-by: Samuel Pitoiset samuel.pitoiset@gmail.com
2019-01-22radeonsi: correct WRITE_DATA.DST_SEL definitionsMarek Olšák1-1/+1
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-11-14nir: replace nir_load_system_value calls with appropiate builder functionsKarol Herbst1-4/+4
this helps reduce the overall code changes when a bit_size parameter is added to nir_load_system_value Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Karol Herbst <kherbst@redhat.com>
2018-09-28radv: adjust the CmdUpdateBuffer threshold for optimal performanceSamuel Pitoiset1-1/+1
According to my benchmark results, it appears that we should reduce the threshold to 1024. BEFORE: 1 KB: 68.656000 ms 2 KB: 118.368000 ms AFTER: 1 KB: 31.760000 ms 2 KB: 29.840000 ms Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-18radv: add support for VK_EXT_conditional_renderingSamuel Pitoiset1-0/+10
Inherited commands buffers are not supported. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-07-13nir: cleanup oversized arrays in nir_swizzle callsKarol Herbst1-2/+2
There are no fixed sized array arguments in C, those are simply pointers to unsized arrays and as the size is passed in anyway, just rely on that. where possible calls are replaced by nir_channel and nir_channels. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Signed-off-by: Karol Herbst <kherbst@redhat.com>
2018-07-12radv: get rid of buffer object prioritiesSamuel Pitoiset1-4/+4
We mostly use the same priority for all buffer objects, so I don't think that matter much. This should reduce CPU overhead a little bit. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-03-01radv: only emit cache flushes when the pool size is large enoughSamuel Pitoiset1-6/+0
This is an optimization which reduces the number of flushes for small pool buffers. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-11-13radv: optimize calling radv_cmd_buffer_trace_emit()Samuel Pitoiset1-1/+2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-11-06radv: wrap cs_add_buffer in an inline. (v2)Dave Airlie1-4/+4
The next patch will try and avoid calling the indirect function. v2: add a missing conversion. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-10-27radv: make radv_fill_buffer() return the needed flush bitsSamuel Pitoiset1-3/+10
Only needed when the CS path is used. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-25radv: use a define for the transition point between cp and compute shaderDave Airlie1-3/+9
For certain buffer meta ops we can use the CP or a compute shader, we should use a define to rather than hardcoding 4096, allows for easier testing and more consistency. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-10-06radv: convert all COMPUTE operations to the RADV_META_SAVE_XXX flagsSamuel Pitoiset1-6/+11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-02radv: cleanup radv_device_finish_meta_XXX() helpersSamuel Pitoiset1-29/+16
Unnecessary to double check that handles are not NULL. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-02radv: do not need to double zero-init the meta state structuresSamuel Pitoiset1-2/+0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-27radv: store the amount of saved constants in the compute stateSamuel Pitoiset1-2/+2
It's safer and more elegant. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-20radv: Don't use a virtual function for getting the buffer virtual address.Bas Nieuwenhuizen1-4/+4
We are really not going to use a winsys which does not need to store the va, so might as well store it in a standard field. Not sure this helps perf much though, as most of the cost is in the cache miss accessing the bo anyway, which we stil need to do. Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-05-09nir: Embed the shader_info in the nir_shader againJason Ekstrand1-14/+14
Commit e1af20f18a86f52a9640faf2d4ff8a71b0a4fa9b changed the shader_info from being embedded into being just a pointer. The idea was that sharing the shader_info between NIR and GLSL would be easier if it were a pointer pointing to the same shader_info struct. This, however, has caused a few problems: 1) There are many things which generate NIR without GLSL. This means we have to support both NIR shaders which come from GLSL and ones that don't and need to have an info elsewhere. 2) The solution to (1) raises all sorts of ownership issues which have to be resolved with ralloc_parent checks. 3) Ever since 00620782c92100d77c660f9783504c6d80fa1d58, we've been using nir_gather_info to fill out the final shader_info. Thanks to cloning and the above ownership issues, the nir_shader::info may not point back to the gl_shader anymore and so we have to do a copy of the shader_info from NIR back to GLSL anyway. All of these issues go away if we just embed the shader_info in the nir_shader. There's a little downside of having to copy it back after calling nir_gather_info but, as explained above, we have to do that anyway. Acked-by: Timothy Arceri <tarceri@itsqueeze.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-05-08radv: set base/ranges for push constant loads.Dave Airlie1-0/+2
This isn't necessary yet but I'd like to use the range in some future patches. [airlied: add new resolve pass] Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-04-14radv: use push descriptors in metaFredrik Höglund1-72/+50
Use push descriptors instead of temp descriptor sets. Signed-off-by: Fredrik Höglund <fredrik@kde.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-04-13radv: Add more trace points.Bas Nieuwenhuizen1-0/+2
Most trace points happen after an operation, so add a trace point at the start of the command buffer. Furthermore, add one after a CmdUpdateBuffer using CP_DMA as that didn't emit one yet. Signed-off-by: Bas Nieuwenhuizen <basni@google.com> Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-04-13radv: Ignore CmdUpdateBuffer with size 0.Bas Nieuwenhuizen1-0/+3
Signed-off-by: Bas Nieuwenhuizen <basni@google.com> Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-03-14radv: Flush before copying with PKT3_WRITE_DATA in CmdUpdateBufferAlex Smith1-0/+2
Need to flush before updating the buffer to ensure that the copy is ordered after previous accesses (assuming the app has performed the appropriate barriers). This fixes potential issues due to draws prior to an update reading the new buffer content, despite having the necessary barriers between them. Signed-off-by: Alex Smith <asmith@feralinteractive.com> Cc: 17.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-02-20Revert "radv: detect command buffers that do no work and drop them (v2)"Dave Airlie1-1/+0
This just keeps popping up minor problems and regressions we should revisit in a more sustainable manner later. This also reverts: Revert "radv: query cmds should mark a cmd buffer as having draws." Revert "radv: also fixup event emission to not get culled." This reverts commit d1640e79328af4a63c056e3ccab299a3bffbede7. This reverts commit 8b47b97215af7157bc15676167cab73aa5a61a76. This reverts commit b4b19afebeac84ddce3f1f8b7ffe0da6474fe29a. Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-13radv: detect command buffers that do no work and drop them (v2)Dave Airlie1-0/+1
If a buffer is just full of flushes we flush things on command buffer submission, so don't bother submitting these. This will reduce some CPU overhead on dota2, which submits a fair few command streams that don't end up drawing anything. v2: reorganise loop to count first then malloc, rename some vars (Bas) Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-18radv: update vkCmdUpdateBuffer for the MEC.Bas Nieuwenhuizen1-1/+3
Signed-off-by: Bas Nieuwenhuizen <basni@google.com> Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-11-11vulkan: import latest public vulkan headers + and fix drivers.Dave Airlie1-1/+1
I just noticed the new vulkan headers changed a prototype, so I've decided to import them and fix the drivers to use the new API. Acked-by: Jason Ekstrand <jason.ekstrand@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-10-26nir/i965/anv/radv/gallium: make shader info a pointerTimothy Arceri1-14/+14
When restoring something from shader cache we won't have and don't want to create a nir_shader this change detaches the two. There are other advantages such as being able to reuse the shader info populated by GLSL IR. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-07radv: add initial non-conformant radv vulkan driverDave Airlie1-0/+543
This squashes all the radv development up until now into one for merging. History can be found: https://github.com/airlied/mesa/tree/semi-interesting This requires llvm 3.9 and is in no way considered a conformant vulkan implementation. It can run a number of vulkan applications, and supports all GPUs using the amdgpu kernel driver. Thanks to Intel for providing anv and spirv->nir, and Emil Velikov for reviewing build integration. Parts of this are: Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net> Authors: Bas Nieuwenhuizen and Dave Airlie Signed-off-by: Dave Airlie <airlied@redhat.com>
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