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AgeCommit message (Expand)AuthorFilesLines
2023-12-06nvk/xfb: set correct counter buffer for writing stream out counters.Dave Airlie1-0/+3
2023-11-03nvc0: implement PIPE_CAP_TIMER_RESOLUTIONKarol Herbst1-0/+3
2023-10-24glsl: Remove int64 div/mod lowering.Eric Anholt25-2150/+1
2023-08-17nouveau: take glsl_type ref unconditionallyKarol Herbst1-5/+4
2023-08-16nv50/ir: Remove few nvc0 specific defines from nv50-specific header.Andrew Randrianasulu1-6/+0
2023-08-04nvk: align geometry clip setting with nvc0Dave Airlie1-1/+1
2023-08-04nvk: Basic tessellation shader supportGeorge Ouzounoudis4-3/+140
2023-08-04nvk: Support for vertex shader transform feedbackGeorge Ouzounoudis8-0/+261
2023-08-04nvk: Compile geometry shadersGeorge Ouzounoudis2-23/+61
2023-08-04nil: Properly support MSAAFaith Ekstrand3-19/+106
2023-08-04nvk: lower io to temps to avoid output reads in vertex shadersDave Airlie1-2/+11
2023-07-21nvc0: Keep nir directly in nvc0_programM Henning4-35/+18
2023-07-20nvc0: fix num_gprs for Volta+Karol Herbst2-3/+12
2023-07-19nvc0: initial Ada enablementKarol Herbst5-0/+9
2023-07-12nvc0: backport fp helper invocation fix to 2nd gen Maxwell+Karol Herbst3-2/+79
2023-06-24nvc0: fix printing shadersKarol Herbst1-1/+1
2023-06-03nv50: Fix memory leak in error pathVinson Lee1-1/+1
2023-05-13nvc0: Free blitter->vpM Henning1-0/+6
2023-05-13nv50,nvc0: Free nir from blitter fp shaderM Henning2-2/+2
2023-05-02nvc0: do not randomly emit fences.Karol Herbst3-6/+6
2023-04-25nv50,nvc0: Use ttn for tgsi shaders by defaultM Henning2-6/+36
2023-04-25nv50,nvc0: Stop advertising TGSI by defaultM Henning2-3/+7
2023-04-25nv50,nvc0: Use nir in nv50_blitter_make_fpM Henning2-84/+132
2023-04-25nvc0: Use nir in nvc0_blitter_make_vpM Henning1-21/+45
2023-04-25nvc0: Use nir in nvc0_program_init_tcp_emptyM Henning1-8/+13
2023-04-06nv50,nvc0: Use u_pipe_screen_get_param_defaultsAlyssa Rosenzweig2-232/+5
2023-03-31nvc0: implement get_compute_state_infoKarol Herbst1-0/+26
2023-03-30nvc0: enable fp helper invocation memory loads on Turing+Karol Herbst3-2/+65
2023-02-13nvc0/nv50: support and enable EXT_memory_object*Yusuf Khan5-2/+99
2022-11-09nvc0: fix ga10x compute launchBen Skeggs1-2/+8
2022-11-09nvc0: no tex cb mthd on ga10xBen Skeggs1-1/+1
2022-11-09nvc0: recognise ga10x chipsetsBen Skeggs3-0/+10
2022-11-09nvc0: properly allocate copy engine class before using itBen Skeggs3-3/+29
2022-11-09nvc0: lookup supported classes instead of determining from chipsetBen Skeggs3-155/+69
2022-11-02nouveau/nvc0: Remove unused validate_zcull functionAntónio Monteiro1-51/+0
2022-11-02nouveau/nvc0: Remove unused alternative sample position ms8António Monteiro1-8/+0
2022-09-08nv50/ir: fix OP_UNION resolving when used for vector valuesKarol Herbst1-1/+1
2022-08-31nvc0: fix a warning -Wconstant-conversionThomas H.P. Andersen1-1/+1
2022-08-31nir_to_tgsi: Use nir_lower_discard_if for demote_if.Emma Anholt1-0/+3
2022-08-31nir_to_tgsi: Add support for demote, is_helper_invocation, and subgroup ops.Emma Anholt2-0/+36
2022-08-30nvc0: make state handling race freeKarol Herbst11-5/+55
2022-08-30nv50: remove nv50_bufctx_fence call in vbo_kick_notifyKarol Herbst1-2/+0
2022-08-23nvc0: limit max global and alloc sizeKarol Herbst1-2/+3
2022-08-23nv50: Rename interps to fixupsPierre Moreau2-5/+5
2022-08-23nv50: Rename fixups to relocsPierre Moreau2-5/+5
2022-08-23nv50,nvc0: Do not resize global residents if unnecessaryPierre Moreau2-2/+2
2022-06-04nouveau/nvc0: disable GLSL IR loop unrollingTimothy Arceri2-10/+36
2022-04-29nouveau/nir: Put the UBO offset indirect into the address reg.Emma Anholt1-0/+2
2022-04-29nv50/nir: align tlsspace to 0x10Karol Herbst1-1/+1
2022-04-20nir_to_tgsi: Make vec_to_movs avoid unsupported coalescing for 64-bit.Emma Anholt1-39/+49
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