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2024-03-07ci: Update virglrenderer and crosvmCorentin Noël3-9/+9
Update virglrenderer to test EXT_attachment_feedback_loop_layout Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28014>
2024-02-05d3d10umd: Rename d3d10sw target to d3d10umdMax R9-2/+2
Other drivers such as virgl are planned to be added to d3d10... target. As it is not a purely software driver d3d10sw target is renamed to d3d10umd target to reflect that. Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27416>
2024-02-05virgl: Pass cmd_buf to flush_frontbufferMax R3-1/+4
Required by gdi virgl winsys. Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27308>
2024-02-05virgl: Allow importing resources without known templMax R3-7/+13
On windows when external resources are imported there is no information about them. And in such cases resource_from_hanlde templ argument is equal NULL. To support such case on virgl, virgl winsys can now fill in template for resource, that will be used if templ=NULL. Additionally helper functions were added to convert virgl encoded enums to pipe. Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27308>
2024-02-05virgl: Implement PIPE_QUERY_GPU_FINISHEDMax R1-3/+30
Implemented using fences, similarly to zink. Requierd by d3d10umd frontend. Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27308>
2024-02-05virgl: Fix crash when no VE boundMax R1-1/+1
While OpenGL requires that VE must be bound, other mesa frontends, f.e. d3d10umd, can emit draw without any VE bound. Which led to vctx->vertex_elements to be null, which lead to null derefence. Add check for ve not being null to avoid that. Supported by virglrenderer@b8ac10db Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27308>
2024-02-05virgl: Fix compilation on MSVCMax R12-26/+41
* Cast to uint8_t* before doing pointer arithmetics * Add zero to initializer list to initialize zeroed structs * Don't include linux sepcific headers on WIN32 * Don't use build_id when it isn't available Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27308>
2024-01-29ci: Upref virglrendererGert Wollny2-3/+3
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27106>
2024-01-29virgl: Use better reporting for mirror_clamp featuresGert Wollny2-0/+3
Fixes: 9efe50c83bfa3678fe7ad3cfcd94cf73d900be22 virgl: report MIRROR_CLAMP features better Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27106>
2024-01-26virgl: use PIPE_MAX_SAMPLERS in bind_samplers_statesRyan Neph1-1/+1
Fix incorrect use of PIPE_MAX_SHADER_SAMPLER_VIEWS in virgl_bind_samplers_states. Signed-off-by: Ryan Neph <ryanneph@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27251>
2024-01-10egl/android: Switch to generic buffer-info codeRoman Stratiienko6-670/+59
Switch to a new common buffer-info layer. After this change, the virgl fallback logic is changed, but it should work as well. Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com> Tested-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24374>
2024-01-08virgl: Assert build_id_note before dereferencing itCorentin Noël1-1/+3
Fix defect reported by Coverity Scan. Dereference null return value If the function actually returns a null value, a null pointer dereference will occur. CID: 1492763 Signed-off-by: Corentin Noël <corentin.noel@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26924>
2024-01-04virgl: Only send the same amount of data than declared in pipe_sampler_stateCorentin Noël2-5/+5
Adjust the masks to only send the data that we are sure to actually use. Signed-off-by: Corentin Noël <corentin.noel@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26856>
2023-12-05venus: add dri option to enable multi-plane wsi modifiersRyan Neph4-0/+14
Adds a venus dri option to advertise support for multi-plane format modifiers to Vulkan's common WSI. Otherwise, Venus will only support modifiers with planeCount == 1 to ensure compatibility with Xwayland's virgl-backed Glamor backend. Signed-off-by: Ryan Neph <ryanneph@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26240>
2023-12-05venus: reject multi-plane modifiers for tiled wsi imagesRyan Neph1-5/+79
Force the use of single-plane modifiers for tiled wsi images as long as Venus is integrated with Virgl, which does not support non-format compression metadata planes (e.g. Intel's CCS or AMD's DCC modifiers). Signed-off-by: Ryan Neph <ryanneph@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26240>
2023-12-05virgl: implemement resource_get_param() for modifier queryRyan Neph1-0/+23
Without such, Xwayland gets back the implicit modifier token (INVALID) when calling gbm_bo_get_modifier() for a dmabuf shared by the WSI layer. Then mistakenly sends INVALID upon wl_buffer creation, rather than the explicit modifier sent by WSI. The logic of Xwayland's Glamor gbm backend is a bit circuitous, since the modifier is sent by WSI alongside the dmabuf fd. Rather than use that modifier directly when creating wl_buffer (via zwp_linux_dmabuf_v1), Glamor first imports the dmabuf+modifier with gbm_bo_import(), then uses the result of later gbm_bo_get_modifier(). Signed-off-by: Ryan Neph <ryanneph@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26240>
2023-11-07zink: apply can_do_invalid_linear_modifier to VenusYiwei Zhang1-0/+1
This unblocks Xwayland with zink-on-venus + sommelier wayland proxy. - For glamor, zink uses linear modifier. - For Virgl clients, classic 3d resource is used and sommelier fixes the modifier and stride infos no matter wl-drm or dma-buf protocol. - For Venus clients: - via the legacy wl-drm protocol, invalid modifier is passed via sommelier, and host recovers the tiling in the way dealing with modifier unaware clients (e.g. I915_GEM_GET_TILING). For hosts unable to recover, they assume linear and venus forces linear on legacy path. - via the new zwp_linux_dmabuf_feedback_v1 (version 3/4) protocol, explicit modifier is used, and zink handles that without issues. This doesn't deserve a driconfig as zink-on-venus to support xserver itself already requires special enough integration beyond a config. Reported-by: Igor Torrente <igor.torrente@collabora.com> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10066 Fixes: 1c3db3e39a7 ("zink: blow up broken xservers more reliably") Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org> Reviewed-by: Ryan Neph <ryanneph@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26082>
2023-11-06venus: Add use_guest_vram capset to enable guest-based blob allocAndrew Gazizov2-0/+10
For hypervisors that do not support host memory injection into the guest address space, it's necessary to have guest-based blob alloc. Therefore, use a new 'use_guest_vram' virgl capset to decide on performing guest blob allocations from dedicated heap (Host visible memory). Signed-off-by: Andrew D. Gazizov <andrew.gazizov@opensynergy.com> Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25889>
2023-11-02virgl/texture: Align destination box to block depthCorentin Noël1-0/+3
In the case of a 3D texture, make sure to align to the block depth. Signed-off-by: Corentin Noël <corentin.noel@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26005>
2023-11-02virgl: fill the array_size value when using PIPE_TEXTURE_CUBECorentin Noël1-0/+1
The cube texture type also requires array sizes. Signed-off-by: Corentin Noël <corentin.noel@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26005>
2023-11-01ci: Uprev virglrendererMax R2-3/+3
Include the latest virglrenderer version. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25947>
2023-11-01virgl: Implement clear_render_target and clear_depth_stencilMax R4-2/+107
This functions are required by d3d10umd frontend. To implement both clear_render_target and clear_depth_stencil common virgl command VIRGL_CCMD_CLEAR_SURFACE is introduced. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25947>
2023-10-31virgl: Use host reported limits for max outputsGert Wollny2-2/+15
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24136>
2023-10-17virgl: Fix logic for reporting PIPE_MIRROR_CLAMPGert Wollny1-1/+1
Fixes: 9efe50c83 (virgl: report MIRROR_CLAMP features better) Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25755>
2023-10-12ci: Uprev virglrendererCorentin Noël2-3/+3
Include the latest virglrenderer version. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25561>
2023-10-07virgl: Use common clear_texture if host doesn't support the featureGert Wollny1-3/+8
v2: Fix include (osy) Fixes: a1eabeff (gallium: remove PIPE_CAP_CLEAR_TEXTURE) Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9944 Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25580>
2023-10-07venus: fix re-export of imported classic 3d resourcesYiwei Zhang1-14/+8
When the guest driver is Virgl while Xwayland is on Zink, Virgl can request virtgpu classic 3d resource allocations for swapchain images. Zink will import when the image is shared with xserver and will export for fd info of all 2d images later to be forwarded. Cc: mesa-stable Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25579>
2023-09-30virgl:Fix ITEM_CPY macro pointer copy bugCong Liu1-2/+4
The ITEM_CPY macro uses the memcpy function to copy the item variable. When item is a pointer, the memcpy function will copy the value of the pointer, not the address that the pointer points to. Signed-off-by: Cong Liu <liucong2@kylinos.cn> Reviewerd-by: Feng Jiang <jiangfeng@kylinos.cn> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25453>
2023-09-25ci: Upref virglrendererGert Wollny2-2/+2
Pull in the latest changes regarding texture wrapping modes handling. Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25343>
2023-09-25virgl: report MIRROR_CLAMP features betterGert Wollny2-3/+6
The new host version checks the support of these features better, so report here accordingly. This fixes a number of texwrap piglit tests on Intel. v2: Stick to old test for PIPE_CAP_TEXTURE_MIRROR_CLAMP because host has to be backward compatible. Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25343>
2023-09-22virgl: Cover all the formats defined in the virgl definitionCorentin Noël2-36/+305
Add all the formats currently defined in u_formats.h Also make sure that no format on virgl protocol has the same number as another one. Make so that the virgl_formats_conv_table is following the same order as virgl_formats Signed-off-by: Corentin Noël <corentin.noel@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25295>
2023-09-19ci/virgl: Disable virgl-iris-traces.Emma Anholt1-1/+1
It's been failing with "No virgl contexts available on hostlibEGL warning: egl: failed to create dri2 screen" for ages, and nobody seems to care. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25301>
2023-09-09virgl, nir_to_tgsi: Add a hack for promoting partial memory barriersKenneth Graunke3-1/+20
Most drivers will want nir_opt_barrier_modes() to optimize out unnecessary memory barrier modes. However, virgl has to translate back to GLSL, which means it can really only handle partial memory barriers in compute shaders today, because there isn't a proper way to express them otherwise. Just ask nir_to_tgsi to promote these back to full barriers as a workaround. See KHR-GL43.shader_storage_buffer_object.advanced-readWrite-case1 on virpipe-on-gl as a case where this hack is needed. Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24842>
2023-08-30virgl: Do not expose EXT_texture_mirror_clamp when using a GLES hostCorentin Noël1-0/+2
The GL_MIRROR_CLAMP_EXT wrap parameter is never available in GLES. This fixes the `spec@!opengl 1.1@texwrap 2d proj` piglit test when using a GLES host. Signed-off-by: Corentin Noël <corentin.noel@collabora.com> Reviewed-by: Filip Gawin <filip.gawin@collabora.com> Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24935>
2023-08-29ci/virgl: flakes in functional.draw_buffers_indexed groupDavid Heidelberg1-0/+2
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24922>
2023-08-23CODEOWNERS: Add @flynnjiang for VirGL videoFeng Jiang1-0/+4
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn> Acked-by: Corentin Noël <corentin.noel@collabora.com> Acked-by: Yonggang Luo <luoyonggang@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24570>
2023-08-21r300: remove some virglrenderer specifics from ntrPavel Ondračka1-15/+0
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com> Reviewed-by: Emma Anholt <emma@anholt.net> Reviewed-by: Filip Gawin <filip.gawin@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23437>
2023-08-14virgl: fix some indentationMike Blumenkrantz1-9/+9
no functional changes Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24117>
2023-08-14virgl: move virgl_vertex_elements_state to headerMike Blumenkrantz2-6/+6
no functional changes Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24117>
2023-08-09virgl/video: Enable AV1 decodingFeng Jiang1-0/+1
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn> Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23386>
2023-08-09virgl/video: Add support for AV1 decodingFeng Jiang1-1/+172
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn> Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23386>
2023-08-09virgl/video: Add definition of virgl_av1_picture_descFeng Jiang1-0/+186
The virgl_av1_picture_desc references to pipe_av1_picture_desc. Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn> Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23386>
2023-08-09frontends/va: Add slice_count to AV1 slice_parameterFeng Jiang2-0/+4
Save the number of slice in AV1 slice parameter, so that the underlying driver (such as virgl) can handle the slice parameters better. Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn> Suggested-by: Sil Vilerino <sivileri@microsoft.com> Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Reviewed-by: Sil Vilerino <sivileri@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23386>
2023-08-07virgl: add ci flakeantonino1-0/+1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24539>
2023-08-04virgl: Only PIPE_BUFFER with VIRGL_BIND_CUSTOM flag is considered busy ↵Feng Jiang1-1/+9
during creation When the virglrenderer performs the attach action for the PIPE_BUFFER with the VIRGL_BIND_CUSTOM flag, it will synchronize the data from res->ptr to res->iov, at this time we need to treat it as busy, otherwise it will cause some race conditions. This optimizes commit: fe9333f7b5e ("virgl: Set res->maybe_busy to true when creating resources") Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18098>
2023-07-28virgl: link VA driver with build-idAlex Denes1-2/+2
Without a build-id the virgl VAAPI driver segfaults trying to access the NULL returned by the build-id header retriever used for disk caches Fixes: d6db4d2e081 ("virgl: Add simple disk cache") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19885>
2023-07-19virgl: Enable vp9 hardware decodeHonglei Huang2-0/+3
Add vp9 fill function in fill_picture_desc to enable vp9 decoding. Signed-off-by: Honglei Huang <honglei1.huang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn> Signed-off-by: Huang Rui <ray.huang@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
2023-07-19virgl: Implement vp9 hardware decodeBoyuan Zhang1-3/+80
Implement vp9 hardware decode by filling vp9 picture desc. Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn> Signed-off-by: Huang Rui <ray.huang@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
2023-07-19virgl: Add vp9 picture descBoyuan Zhang1-0/+82
Define vp9 picture and slice parameters. Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn> Signed-off-by: Huang Rui <ray.huang@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
2023-07-19virgl/video: Add jpeg buf start code checkHonglei Huang1-0/+3
Add jpeg start code check to fix the issue that double header adding in virgl video codec. Signed-off-by: Honglei Huang <honglei1.huang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn> Signed-off-by: Huang Rui <ray.huang@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>