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2021-01-13VERSION: bump to 20.3.3mesa-20.3.3Dylan Baker1-1/+1
2021-01-13docs: add release notes for 20.3.3Dylan Baker1-0/+133
2021-01-12vulkan/overlay: fix vkGetInstanceProcAddr self-resolvingGeorg Lehmann2-1/+2
vkGetInstanceProcAddr(instance, "vkGetInstanceProcAddr") should return our vkGetInstanceProcAddr not the next in the chain. CC: mesa-stable Signed-off-by: Georg Lehmann <dadschoorse@gmail.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8285> (cherry picked from commit fff77e4b434a4989e6c54ab7ef8d1aa22fe81b3a)
2021-01-12radv: Add Android module info to linker script.Bas Nieuwenhuizen2-1/+6
The Android Vulkan loader needs this symbol, so the addition of the linker script broke Vulkan for Android. (For non-Android builds: I checked that having a non-existent symbol in the linker script works ok and doesn't put the symbol in the library) Fixes: 41bb6459d3a ("radv: restrict exported symbols with static llvm") Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8437> (cherry picked from commit 4956f6d0bf477568731f3965125299b8857d5835)
2021-01-12mesa/st: Free the NIR builtins TGSI tokens after passing to the driver.Eric Anholt2-6/+18
The driver interface doesn't take ownership of the TGSI tokens, so free our temporary. Fixes: 57effa342b75 ("st/mesa: Drop the TGSI paths for PBOs and use nir-to-tgsi if needed.") Reviewed-by: Adam Jackson <ajax@redhat.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8422> (cherry picked from commit 4ddcd9cf165deba2605f5729a0af2f7ded0baad9)
2021-01-12gallium/ntt: Fix leak of the per-instr liveness information.Eric Anholt2-1/+4
Fixes: 34cc6a804ec9 ("gallium: Add a nir-to-TGSI pass.") Reviewed-by: Adam Jackson <ajax@redhat.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8422> (cherry picked from commit 0367bdbdc465d4568733099dae9f2cc2e3eb2021)
2021-01-12radv: set invariantgeom for Shadow of the Tomb RaiderRhys Perry2-1/+5
Work around flickering foliage on GFX10.3 Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4064 Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8104> (cherry picked from commit 255ca7ecda36c3623ef730304a13aa2e8b8c0cf8)
2021-01-12radv: add RADV_DEBUG=invariantgeomRhys Perry7-31/+65
This can be used to work around a common class of bugs appearing as flickering. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8104> (cherry picked from commit f17de6a803d2fd21dc0f74b0cb28a65cd9eca257)
2021-01-12vulkan/overay: fix violation of VUID-VkDeviceCreateInfo-pNext-00373Pavel Asyutchenko3-8/+24
We can't use VkDeviceCreateInfo::pEnabledFeatures when VkPhysicalDeviceFeatures2 is present in pNext chain. Fixes: ea7a6fa98055ad ("vulkan/overlay: add pipeline statistic & timestamps support") Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8208> (cherry picked from commit 208538143293466c5a90f6dc8a5aaa67849e3557)
2021-01-12vulkan/device-select: fix vkGetInstanceProcAddr self-resolvingGeorg Lehmann2-1/+3
vkGetInstanceProcAddr(instance, "vkGetInstanceProcAddr") should return our vkGetInstanceProcAddr not the next in the chain. CC: mesa-stable Signed-off-by: Georg Lehmann <dadschoorse@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8286> (cherry picked from commit 67de6356f8474fa11bb8c64e835f30a910a32b1f)
2021-01-12radv/winsys: Fix offset in range merging.Bas Nieuwenhuizen2-1/+2
If we change the virtual address we also have to change the offset in the buffer to be mapped. Fixes: 715df30a4e2 "radv/amdgpu: Add winsys implementation of virtual buffers." Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7953> (cherry picked from commit d3286bdd764741b2cb6d30b59450ce9473884430)
2021-01-12radv/winsys: Fix inequality for sparse buffer remapping.Bas Nieuwenhuizen2-2/+2
Found a case where we mapped a range too many. Per the comment the constraint is: /* [first, last] is exactly the range of ranges that either overlap the * new parent, or are adjacent to it. This corresponds to the bind ranges * that may change. */ So that means that after the ++last we the ranges[last] should still be adjacent. So we need to test the post-increment value to see whether it is adjacent. Failure case: ranges: 0: 0 - ffff 1: 10000 - 1ffff 2: 20000 - 2ffff 3: 30000 - 3ffff new range: 10000 - 1ffff wrong first, last: 0,3 However range 3 clearly isn't adjacent at all. Fixes: 715df30a4e2 "radv/amdgpu: Add winsys implementation of virtual buffers." Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7953> (cherry picked from commit 2b12e6931ef240df44d2c0f9374d6575ad202675)
2021-01-12.pick_status.json: Mark 52b6adfbfb51a3b1a54964cbcb2adb0299d1252b as backportedDylan Baker1-1/+1
2021-01-12util: Avoid pthread_setaffinity_np on NetBSDnia2-2/+2
NetBSD's variant has a different prototype from the Linux version the code expects. It might make sense to add support for NetBSD's version, however, since NetBSD defaults to not allowing non-root users to set processor affinity, there would be little gain here. This is a build fix for NetBSD. Signed-off-by: Nia Alarie <nia@NetBSD.org> Reviewed-by: Dylan Baker <dylan@pnwbakers.com> CC: 20.3 <mesa-stable@lists.freedesktop.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7947> (cherry picked from commit 275079e3adc184ba3841222918e852c3e63f435f)
2021-01-12aco: fix unreachable() for uniform 8/16-bit nir_op_mov from VGPRRhys Perry2-5/+7
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Fixes: d20a752c0de ("aco: use Builder::copy more") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8380> (cherry picked from commit 816b7fb5cb622dd6c5d0fbcecdcb27779029f80f)
2021-01-12util: Disable memstream for Apple buildsJames Park2-2/+4
Not all SDK versions support open_memstream. Maybe some other day. Fixes: af8d488ea5e ("util,ac,aco,radv: Cross-platform memstream API") Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8269> (cherry picked from commit 3fb4755d48d079d47ca212a838d16259db2abcfa)
2021-01-12radv/llvm,aco: always split typed vertex buffer loads on GFX6 and GFX10+Samuel Pitoiset3-13/+17
To avoid any alignment issues that triggers memory violations and eventually a GPU. This can happen if the stride (static or dynamic) is unaligned and also if the VBO offset is aligned to scalar (eg. stride is 8 and VBO offset is 2 for R16G16B16A16_SNORM). The AMD Windows driver also always splits typed vertex fetches. fossils-db (Sienna Cichlid): Totals from 56508 (40.54% of 139391) affected shaders: SGPRs: 2643545 -> 2664516 (+0.79%); split: -0.19%, +0.98% VGPRs: 2007472 -> 1995408 (-0.60%); split: -0.74%, +0.13% CodeSize: 70596372 -> 73913312 (+4.70%); split: -0.00%, +4.70% MaxWaves: 772653 -> 774916 (+0.29%); split: +0.37%, -0.08% Instrs: 14074162 -> 14567072 (+3.50%); split: -0.00%, +3.51% Cycles: 69281276 -> 71253252 (+2.85%); split: -0.00%, +2.85% VMEM: 22047039 -> 25554196 (+15.91%); split: +17.20%, -1.29% SMEM: 4120370 -> 4360820 (+5.84%); split: +7.41%, -1.58% VClause: 416913 -> 438361 (+5.14%); split: -1.86%, +7.01% SClause: 536739 -> 542637 (+1.10%); split: -0.33%, +1.43% Copies: 977194 -> 970015 (-0.73%); split: -2.43%, +1.69% Branches: 241205 -> 241193 (-0.00%); split: -0.06%, +0.06% PreVGPRs: 1505645 -> 1505379 (-0.02%) This fixes GPU hangs with bin/draw-vertices from Piglit on GFX10+ with Zink. Cc: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8363> (cherry picked from commit d2f4934121f65f2f086e4babaa0704e58503234b)
2021-01-12aco: fix creating the dest vector when 16-bit vertex fetches are splittedSamuel Pitoiset2-5/+6
Compute the number of components of the destination vector from the bitsize when eg. a 16-bit vec2 vertex fetches is splitted. This is because the dst will be a v1, so the p_create_vector should be created from two v2b fro both sizes to match. This prevents a regression from the next change which will split typed vertex buffer loads on GFX6 and GFX10+. Cc: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8363> (cherry picked from commit 68c25370626c9ffb360ed3649627c8cf070a7f2b)
2021-01-12nir/load_store_vectorize: don't ignore subgroup memory barriersRhys Perry2-2/+1
Not sure why I thought this was correct, but we should consider them for optimization purposes. Fixes: ce9205c03bd ('nir: add a load/store vectorization pass') Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4202> (cherry picked from commit f4eb833a12523142d908bf67e08904f4e8a866e9)
2021-01-12.pick_status.json: Update to d9c8422c4168c7433f68b97065283ebf26631d56Dylan Baker1-0/+2385
2021-01-12drirc: radeonsi workaround for CS:GOPierre-Eric Pelloux-Prayer1-0/+1
Cherry-picked from 6f2017205e62402b7b2e340620e39cb71730c565 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8411>
2021-01-11radv: disable TC-compat HTILE in GENERAL for Detroit: Become HumanSamuel Pitoiset5-10/+22
The game has invalid usage of render loops and enabling TC-compat HTILE in GENERAL introduces rendering issues. Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3063 Cc: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8412>
2021-01-06zink: dot leak dummy_bufferErik Faye-Lund2-1/+2
Fixes: 8736ffae2ed ("zink: replace unset buffer with a dummy-buffer") Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8099> (cherry picked from commit 07d5d911dd6c7d36fdd678f289d3babdde634406) Conflicts: src/gallium/drivers/zink/zink_context.c
2021-01-06nir/algebraic: Fix broken NaN and -0.0 behaviorIan Romanick2-7/+23
No shader-db or fossil-db changes on any Intel platform. v2: Add a coding line to fix SCons build problems caused by the ± character. Fixes: 25bfba3335d ("nir/algebraic: Recognize open-coded copysign(1.0, a)") Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358> (cherry picked from commit 9771af5ddec37481042f6109772f15773642104c) Conflicts: src/compiler/nir/nir_opt_algebraic.py
2021-01-06Revert "nir: Replace an odd comparison involving fmin of -b2f"Ian Romanick2-14/+1
I originally noticed that 3b308147916 ("nir/algebraic: Optimize 1-bit Booleans") caused this pattern no longer be matched by incorrectly replacing b@32 with b@1. Making that correct had no effect on shader-db. When this pattern originally was added, it only affected 4 shaders, so it's not worth the effort to debug further. This reverts commit f50400cc8040cf2d07de97e76d9b1ed144c5c8b4. Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358> (cherry picked from commit 314a40c902c6e92b9d6ba0e9b43708d7e1fa9f00)
2021-01-06gallium/util: do not perform n^2 stencil blitsErik Faye-Lund2-2/+2
We already loop n times here, no point in doing n instances as well. Fixes: e8a40715a8b ("gallium/util: add blitter-support for stencil-fallback") Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8301> (cherry picked from commit 96ceca33c1dd69a1feed13b0e19bfc38e6f7d979)
2021-01-06gallium/ntt: Fix emitting UBO declarations.Eric Anholt2-3/+5
Fixes: d70fff99c5bc ("nir: Use a single list for all shader variables") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8196> (cherry picked from commit ec0bab8ca9eaed4648cf9e90398606fa4fc6e747)
2021-01-06ac/nir: use llvm.readcyclecounter for LLVM9+Rhys Perry2-3/+4
Unlike llvm.amdgcn.s.memtime, this works on GFX10.3 Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4033 Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8306> (cherry picked from commit c5973ede01c4d5458b3d487f7b7486707d905c52)
2021-01-06util: add AMD CPU family enums and enable L3 cache pinning on Zen3Marek Olšák3-2/+25
Based on: https://en.wikichip.org/wiki/amd/cpuid The only reason it's nominated as a fix is because Zen3 might underperform because the CPU detection ignored it. Fixes: 15fa2c5e359 - gallium/u_cpu_detect: get the number of cores per L3 cache for AMD Zen Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8225> (cherry picked from commit e4fa7c440d273aad6cb9b9a6ee42a78810c9c2c2)
2021-01-06spir-v: Mark floating point comparisons exactIan Romanick4-30/+82
OpenGL GLSL, OpenGL ARB assembly shaders, and DX9 are pretty loose about the behavior in the presence of NaNs. Many GPUs that implement these specifications do not even have a representation of NaN. However, OpenCL and Vulkan SPIR-V are not so lax. Both actually have some required behavior in the presence of NaN, and, of the two, OpenCL is the most strict. For years we have implemented SPIR-V by using the same comparison opcodes as we use for OpenGL GLSL and OpenGL assembly shaders. This has repeatedly caused problems where an optimization that is valid in the NaN-relaxed world is not valid in Vulkan or OpenCL. To fix this, set the "exact" flag on comparisons instructions generated from SPIR-V. This will block optimizations that may have different NaN behavior. v2: Set the exact flag in the nir_builder, not in the vtn_builder. v3: Add an assertion in vtn_handle_constant that the exact flag wasn't set (because it's ignored). Rebase on 80163bbec3a ("nir/vtn: Support OpOrdered and OpUnordered opcodes"). Mark the NIR generated for those opcodes as exact as well. v4: s/unused_exact/exact/ in a couple places, and assert that exact has the expected value (true in one place, false in the other). Suggested by Caio. Closes: #3345 Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Tested-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com> Fixes: 8513b12590c ("nir/opt_if: split ALU from Phi more aggressively") This commit doesn't really fix anything in 8513b12590c. However, without 8513b12590c, a regression is triggered in RADV on No Man's Sky. I want to ensure that this change is only applied on top of 8513b12590c, and Fixes: seems the safest way to do that. No shader-db changes on any Intel platform. This only affects SPIR-V, and we have no OpenGL SPIR-V shaders in shader-db. 124 shaders in Shadow of the Tomb Raider (Steam "native") were hurt by 1 spill and 1 fill each. All Intel platforms had similar results. (Tiger Lake shown) Instructions in all programs: 155668276 -> 155685764 (+0.0%) SENDs in all programs: 6474570 -> 6474570 (+0.0%) Loops in all programs: 35271 -> 35271 (+0.0%) Cycles in all programs: 3198055373 -> 3198628031 (+0.0%) Spills in all programs: 231522 -> 231646 (+0.1%) Fills in all programs: 347571 -> 347695 (+0.0%) Vega Totals: SGPRs: 20955712 -> 20956756 (+0.00%); split: -0.02%, +0.03% VGPRs: 13476920 -> 13473132 (-0.03%); split: -0.07%, +0.04% CodeSize: 613371940 -> 613339348 (-0.01%); split: -0.06%, +0.05% MaxWaves: 3111886 -> 3112481 (+0.02%); split: +0.02%, -0.00% Instrs: 120723785 -> 120746991 (+0.02%); split: -0.04%, +0.06% Cycles: 626658992 -> 626862708 (+0.03%); split: -0.05%, +0.08% VMEM: 216330854 -> 216343196 (+0.01%); split: +0.04%, -0.04% SMEM: 32079391 -> 32081972 (+0.01%); split: +0.05%, -0.04% VClause: 2688784 -> 2688789 (+0.00%); split: -0.03%, +0.03% SClause: 6554669 -> 6556251 (+0.02%); split: -0.01%, +0.03% Copies: 5356667 -> 5353283 (-0.06%); split: -0.36%, +0.29% Branches: 954466 -> 954716 (+0.03%); split: -0.01%, +0.04% PreSGPRs: 9078300 -> 9081626 (+0.04%); split: -0.01%, +0.05% PreVGPRs: 10972090 -> 10966576 (-0.05%); split: -0.06%, +0.01% Totals from 48239 (12.08% of 399432) affected shaders: SGPRs: 2713984 -> 2715028 (+0.04%); split: -0.16%, +0.19% VGPRs: 1997804 -> 1994016 (-0.19%); split: -0.46%, +0.27% CodeSize: 172094092 -> 172061500 (-0.02%); split: -0.21%, +0.19% MaxWaves: 337327 -> 337922 (+0.18%); split: +0.20%, -0.02% Instrs: 33053657 -> 33076863 (+0.07%); split: -0.15%, +0.22% Cycles: 254961228 -> 255164944 (+0.08%); split: -0.12%, +0.20% VMEM: 15165226 -> 15177568 (+0.08%); split: +0.59%, -0.51% SMEM: 3304938 -> 3307519 (+0.08%); split: +0.49%, -0.41% VClause: 766225 -> 766230 (+0.00%); split: -0.12%, +0.12% SClause: 1332645 -> 1334227 (+0.12%); split: -0.04%, +0.16% Copies: 2040651 -> 2037267 (-0.17%); split: -0.94%, +0.77% Branches: 743668 -> 743918 (+0.03%); split: -0.01%, +0.05% PreSGPRs: 1697667 -> 1700993 (+0.20%); split: -0.07%, +0.27% PreVGPRs: 1718424 -> 1712910 (-0.32%); split: -0.39%, +0.07% Polaris Totals: SGPRs: 21349172 -> 21354376 (+0.02%); split: -0.02%, +0.04% VGPRs: 13690680 -> 13686920 (-0.03%); split: -0.07%, +0.04% CodeSize: 613745824 -> 613704988 (-0.01%); split: -0.06%, +0.05% MaxWaves: 2775012 -> 2775189 (+0.01%); split: +0.01%, -0.00% Instrs: 120735079 -> 120756209 (+0.02%); split: -0.04%, +0.06% Cycles: 627906100 -> 628076156 (+0.03%); split: -0.05%, +0.08% VMEM: 216623065 -> 216641838 (+0.01%); split: +0.04%, -0.04% SMEM: 32295618 -> 32299338 (+0.01%); split: +0.05%, -0.04% VClause: 2711025 -> 2711141 (+0.00%); split: -0.03%, +0.04% SClause: 6545185 -> 6546769 (+0.02%); split: -0.01%, +0.03% Copies: 5387723 -> 5383249 (-0.08%); split: -0.37%, +0.29% Branches: 953775 -> 953954 (+0.02%); split: -0.01%, +0.03% PreSGPRs: 9148814 -> 9153211 (+0.05%); split: -0.01%, +0.06% PreVGPRs: 11029429 -> 11023915 (-0.05%); split: -0.06%, +0.01% Totals from 48239 (12.00% of 402052) affected shaders: SGPRs: 2682056 -> 2687260 (+0.19%); split: -0.16%, +0.35% VGPRs: 1994436 -> 1990676 (-0.19%); split: -0.46%, +0.27% CodeSize: 170857060 -> 170816224 (-0.02%); split: -0.21%, +0.19% MaxWaves: 295429 -> 295606 (+0.06%); split: +0.07%, -0.01% Instrs: 32808802 -> 32829932 (+0.06%); split: -0.16%, +0.22% Cycles: 254633252 -> 254803308 (+0.07%); split: -0.13%, +0.20% VMEM: 14897934 -> 14916707 (+0.13%); split: +0.65%, -0.52% SMEM: 3289726 -> 3293446 (+0.11%); split: +0.53%, -0.42% VClause: 775318 -> 775434 (+0.01%); split: -0.11%, +0.13% SClause: 1304867 -> 1306451 (+0.12%); split: -0.04%, +0.16% Copies: 2026334 -> 2021860 (-0.22%); split: -0.99%, +0.77% Branches: 742554 -> 742733 (+0.02%); split: -0.02%, +0.04% PreSGPRs: 1690887 -> 1695284 (+0.26%); split: -0.07%, +0.33% PreVGPRs: 1717709 -> 1712195 (-0.32%); split: -0.40%, +0.07% Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6358> (cherry picked from commit 010e663cc3401c40182922a04af0719e1898cb62)
2021-01-06st/mesa: don't affect original st_CompressedTexSubImage parametersAndrii Simiklit2-4/+4
The fallback path is still possible here so let keep them as is. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3952 Fixes: 4b02f165 ("st/mesa: implement PBO upload for glCompressedTex(Sub)Image") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8258> (cherry picked from commit 5ae7d40648ca643615fd551a3c6fcecb8301fc91)
2021-01-06.pick_status.json: Update to 96ceca33c1dd69a1feed13b0e19bfc38e6f7d979Dylan Baker1-0/+1836
2021-01-04aco: fix incorrect address calculation for load_barycentric_at_sampleRhys Perry2-2/+2
Fix address calculation for indirect load_barycentric_at_sample on GFX6-8 with a uniform sample index. A non-zero uniform sample index does not seem to be tested by CTS. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3966 Fixes: 93c8ebfa780 ("aco: Initial commit of independent AMD compiler") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8302> (cherry picked from commit b2d000513e4a9b06d3b073913741dae47a00526e)
2021-01-04nir: fix missing nir_lower_pntc_ytransform.c in the makefileDanylo Piliaiev2-1/+2
Fixes: 33fd9e5d "nir: account for point-coord origin when lowering it" Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8308> (cherry picked from commit 81132983cdb0dd9f088743ec43e3a40347424a6c)
2021-01-04nir: account for point-coord origin when lowering itDanylo Piliaiev8-31/+170
The resulting point-coord origin not only depends on whether the draw buffer is flipped but also on GL_POINT_SPRITE_COORD_ORIGIN state. Which makes its transform differ from a transform of wpos. On freedreno fixes: gl-3.2-pointsprite-origin gl-3.2-pointsprite-origin -fbo Fixes: d934d320 "nir: Add flipping of gl_PointCoord.y in nir_lower_wpos_ytransform." Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8200> (cherry picked from commit 33fd9e5d8a6b85e20d34f89df655fa5a75eca431)
2021-01-04etnaviv: Fix rework ZSA into a derived stateMarek Vasut2-1/+3
In case the stencil is modified, it is also enabled. That was the behavior of the original code, which was also the correct behavior, so reinstate the behavior. Fixes dEQP-GLES2.functional.fragment_ops.depth_stencil.* on STM32MP1 GC400T. Fixes: b29fe26d438 ("etnaviv: rework ZSA into a derived state") Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Marek Vasut <marex@denx.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8174> (cherry picked from commit 33a6c01e12cca60903fb78af44ecca3899ad628f)
2021-01-04.pick_status.json: Update to b2d000513e4a9b06d3b073913741dae47a00526eDylan Baker1-0/+540
2021-01-02st/mesa: don't do glCopyPixels via blit if depth bounds test is enabledMarek Olšák2-1/+2
Fixes: 36a6f848bb0 - st/mesa: add EXT_depth_bounds_test Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7720> (cherry picked from commit 8848114345833873aaa7855edbdb40505bc0b736)
2021-01-02pan/mdg: Fix promoted uniform moves with 64-bit typesIcecream952-2/+2
The move source is the second src, not the first one. Fixes: 5e5ea25a0da ("pan/mdg: Explicitly type 64-bit uniform moves") Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264> (cherry picked from commit 97929b1aaf4d0bbb9214cd7a31ee938c78f7e8bc)
2021-01-02nir: fix determining if an addition might overflow for phi sourcesSamuel Pitoiset2-30/+32
nir_addition_might_overflow() expects the parent instruction to be an alu instr but it might be a phi instr. Fix it by assuming that the addition might overflow. This fixes compiler crashes with Horizon Zero Dawn. No fossils-db changes. Cc: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8268> (cherry picked from commit 0b503d8de96c7006c0fe1c8bfdcd8de02f255992)
2021-01-02gallium/draw: Fix intermittent failure to bind new geometry shaders.Eric Anholt2-1/+4
If you deleted your old GS and created a new one, then it would occasionally skip binding the new GS because the token pointers were equal. Clear the current token pointer in the machine when we're deleting its token. Cc: mesa-stable Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8277> (cherry picked from commit 969f50ddcfcf88f641779942210f33519761a08f)
2021-01-02.pick_status.json: Update to 9ef2c44ce682b7981bd7a68c65f338f1e33bb001Dylan Baker1-0/+1296
2020-12-30docs: Add sha256 sum for 20.3.2Dylan Baker1-1/+1
2020-12-30Bump version for 20.3.2 releasemesa-20.3.2Dylan Baker1-1/+1
2020-12-30docs: add release notes for 20.3.2Dylan Baker1-0/+138
2020-12-29glsl: default to compat shaders in compat profileTimothy Arceri2-5/+5
If the shader does not specify "core" or "compatibility" in shaders above 1.40 we were defaulting these shaders to core shaders when in a compat profile. Instead default to compat shaders. This brings us inline with the behaviour of the binary drivers and fixes a crash on start-up for the game Foundation. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3594 Fixes: c7e3d31b0b5f ("glsl: fix compat shaders in GLSL 1.40") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6993> (cherry picked from commit 6c8cc9be12dc5d6c0d2386d6addb69d8f2fb5399)
2020-12-29st/pbo: fix pbo uploads without PIPE_CAP_TGSI_VS_LAYER_VIEWPORT and skip gsMike Blumenkrantz6-28/+37
the previous commit handling this forced geometry shader usage for all cases, but this is not ideal, so instead there are now fragment shader variants for both depth==1 and depth!=1, corresponding to the existence of gl_Layer in the shader Fixes: 614c77772ac ("st/pbo: fix pbo uploads without PIPE_CAP_TGSI_VS_LAYER_VIEWPORT") Acked-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8089> (cherry picked from commit 36097fc7ef70471ecfecd428f990233276e9c45b)
2020-12-29virgl: fix BGRA emulation artifacts during window resizeRyan Neph2-2/+4
On some devices, window resizing results in flashes of blue- and orange-tinted versions of the current frame until resizing is finished. This fix ensures that the emubgra tweak used for GLES virgl hosts has its enabled state flag set properly during resize events. v2: removed unrelated whitespace change Fixes: 6f68cacf619 ("virgl: Always enable emulated BGRA and swizzling unless specifically told not to") Signed-off-by: Ryan Neph <ryanneph@google.com> Reviewed-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8119> (cherry picked from commit accc2222174a90fd24ee56ce751feb6022ecc0c7)
2020-12-29.pick_status.json: Update to 6c8cc9be12dc5d6c0d2386d6addb69d8f2fb5399Dylan Baker1-0/+207
2020-12-29.pick_status.json: Mark 967ae12931e0dc12855de903851222b2f0607878 as denominatedDylan Baker1-1/+1
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-24 11:21:34 +0000