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2014-11-24glsl: Generate unique names for each const array lowered to uniformscros-mesa-10.3-r29-vanillacros-mesa-10.3-r28-vanillacros-mesa-10.3-r15-vanillacros-mesa-10.3-r13-vanillachadv/cros-mesa-10.3-r29-vanillachadv/cros-mesa-10.3-r28-vanillachadv/cros-mesa-10.3-r15-vanillachadv/cros-mesa-10.3-r13-vanillaChris Forbes1-1/+5
Uniform names (even for hidden uniforms) are required to be unique; some parts of the compiler assume they can be looked up by name. Fixes the piglit test: tests/spec/glsl-1.20/linker/array-initializers-1 Signed-off-by: Chris Forbes <chrisf@ijw.co.nz> Cc: "10.4" <mesa-stable@lists.freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-24i965: Handle nested uniform array indexingChris Forbes1-29/+37
When converting a uniform array reference to a pull constant load, the `reladdr` expression itself may have its own `reladdr`, arbitrarily deeply. This arises from expressions like: a[b[x]] where a, b are uniform arrays (or lowered const arrays), and x is not a constant. Just iterate the lowering to pull constants until we stop seeing these nested. For most shaders, there will be only one pass through this loop. Fixes the piglit test: tests/spec/glsl-1.20/linker/double-indirect-1.shader_test Signed-off-by: Chris Forbes <chrisf@ijw.co.nz> Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-11-24r600g: do all CUBE ALU operations before gradient texture operations (v2.1)Dave Airlie1-64/+72
This moves all the CUBE section above the gradients section, so that the gradient emission happens on one block which is what sb/hardware expect. v2: avoid changes to bytecode by using spare temps v2.1: shame gcc, oh the shame. (uninit var warnings) Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org> Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-24r600: fix texture gradients instruction emission (v2)Dave Airlie1-28/+31
The piglit tests were failing, and it appeared to be SB optimising out things, but Glenn pointed out the gradients are meant to be clause local, so we should emit the texture instructions in the same clause. This moves things around to always copy to a temp and then emit the texture clauses for H/V. v2: Glenn pointed out we could get another ALU fetch in the wrong place, so load the src gpr earlier as well. Fixes at least: ./bin/tex-miplevel-selection textureGrad 2D Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com> Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-23nv50,nvc0: buffer resources can be bound as other things down the lineIlia Mirkin2-14/+14
res->bind is not an indicator of how the resource is currently bound. buffers can be rebound across different binding points without changing underlying storage. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
2014-11-23nv50,nvc0: actually check constbufs for invalidationIlia Mirkin2-3/+6
The number of vertex buffers has nothing to do with the number of bound constbufs. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
2014-11-23nv50/ir: set neg modifiers on min/max argsIlia Mirkin1-0/+2
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=86618 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
2014-11-23mesa: Fix function name in GetActiveUniformName errorChris Forbes1-1/+1
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
2014-11-22i915g: Fallback copy_render for ZS formatsStéphane Marchesin1-1/+11
These don't work out of the box, need more work, maybe with a proxy format? Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22i915g: Add back 4444 and 5551 formatsStéphane Marchesin2-2/+4
Now that we have the transfers working, we can re-add those formats. Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22i915g: Don't limit blitter to POT texturesStéphane Marchesin1-3/+2
Now that we have NPOT support for u_blitter, there is no reason to limit this any longer. Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22i915g: Align all texture dimensions to the next POTStéphane Marchesin1-28/+29
This creates a usable layout for all NPOT textures. Of course these still have lots of limitations, but at least we can render to a level. Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22i915g: Fix typosStéphane Marchesin1-2/+2
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22i915g: Fix maxlod computation.Stéphane Marchesin1-3/+3
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22i915g: Fix offset for level != 0Stéphane Marchesin5-8/+27
For NPOT texture layouts, we want to be able to access texture levels other than 0 directly. Since the hw doesn't support that, We do it by adding the offset directly. Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22i915g: Don't write constants past I915_MAX_CONSTANTStéphane Marchesin1-1/+1
This happens with glsl-convolution-1, where we have 64 constants. This doesn't make the test pass (we don't have 64 constants anyway, only 32) but this prevents it from crashing. Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22i915g: Don't hardcode array size for phase countStéphane Marchesin1-1/+1
This is an array of temp registers, so use I915_MAX_TEMPORARY for the size. Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
2014-11-22draw: allow LLVM use on non-SSE2 X86 cpusDavid Heidelberg1-14/+1
This patch remove workaround related to LLVM < 3.2 bug. Original bug has been closed as fixed in 2011. At this moment gallium requires LLVM 3.3 (2013). LLVM has been tested without SSE2 support in commit ca70de9bd20bc4a11b2d2d368e0cc1f49527a947 and removed after requiring LLVM 3.3 in commit 013ff2fae13da41c2f5619c4698b0a7b5aa6a06d Original LLVM bug: http://llvm.org/bugs/show_bug.cgi?id=6960 Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-11-22docs: add news item and link release notes for mesa 10.3.4Emil Velikov2-0/+7
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-11-22docs: Add sha256 sums for the 10.3.4 releaseEmil Velikov1-1/+3
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> (cherry picked from commit 72c27d7a3acc40b8a77a277f7cd975fb8e60dca5)
2014-11-22Add release notes for the 10.3.4 releaseEmil Velikov1-0/+104
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> (cherry picked from commit 26c8ecd85dade7be5759c4de0b3916fbc186dc43)
2014-11-21i965: Make Gen4-5 push constants call _mesa_load_state_parameters too.Kenneth Graunke1-0/+4
In commit 5e37a2a4a8a, I made the pull constant code stop calling _mesa_load_state_parameters() when there were no pull parameters. This worked fine on Gen6+ because the push constant code also called it if there were any push constants. However, the Gen4-5 push constant code wasn't doing this. This patch makes it do so, like the Gen6+ code. A better long term solution would be to make core Mesa just handle this for us when necessary. Fixes around 8766 Piglit tests on Ironlake, and probably Gen4 as well. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com> Tested-by: Mark Janes <mark.a.janes@intel.com>
2014-11-21i965/vec4/gen8: Handle the MUL dest hazard exceptionBen Widawsky2-2/+19
Fix one of the few cases where we can't reliable touch the destination hazard bits. I am explicitly doing this patch individually so it is easy to backport. I was tempted to do this patch before the previous patch which reorganized the code, but I believe even doing that first, this is still easy to backport. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84212 Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-11-21i965/vec4: Extract depctrl hazardsBen Widawsky1-22/+27
Move this to a separate function so that we can begin to add other little caveats without making too big a mess. NOTE: There is some desire to improve this function eventually, but we need to fix a bug first. v2: Use const for the inst for the hazard check (Matt) Invert safe logic to get rid of the double negative (Matt) Add PRM reference for predicates (Matt) Add note about empirical evidence for math (Matt) Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-11-21i965/fs: Remove is_valid_3src().Matt Turner3-8/+1
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-21i965/fs: Remove is_valid_3src() checks from emit_lrp.Matt Turner1-4/+1
The visitor emits MOVs to temporary registers for immediates, so these never trigger. For further proof, check case ir_triop_fma. Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-21i965/fs: Remove unused apply_stride().Matt Turner2-11/+0
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-21i965/fs: Move ip_record class to its one use.Matt Turner2-12/+12
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-11-21i965: Move common fields into backend_instruction.Matt Turner3-5/+2
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-11-21i965: Combine offset/texture_offset fields.Matt Turner6-15/+13
texture_offset was only used by some texturing operations, and offset was only used by spill/unspill and some URB operations. These fields are never used at the same time. Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-11-21radeonsi: use minnum and maxnum LLVM intrinsics for MIN and MAX opcodesMarek Olšák1-0/+7
So far it has been compiled into pretty ugly code (8 instructions or so for either opcode). Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-11-20vc4: Update for new kernel ABI with async execution and waits.Eric Anholt9-3/+250
Our submits now return immediately and you have to manually wait for things to complete if you want to (like a normal driver).
2014-11-20i915: Only use TEXCOORDTYPE_VECTOR with cube maps on gen2Ville Syrjälä1-18/+19
Check that the target is GL_TEXTURE_CUBE_MAP before emitting TEXCOORDTYPE_VECTOR texture coordinates. I'm not sure if the hardware would like CARTESIAN coordinates with cube maps, and as I'm too lazy to find out just emit the VECTOR coordinates for cube maps always. For other targets use CARTESIAN or HOMOGENOUS depending on the number of texture coordinates provided. Fixes rendering of the "electric" background texture in chromium-bsu main menu. We appear to be provided with three texture coordinates there (I'm guessing due to the funky texture matrix rotation it does). So the code would decide to use TEXCOORDTYPE_VECTOR instead of TEXCOORDTYPE_CARTESIAN even though we're dealing with a 2D texure. The results weren't what one might expect. demos/cubemap still works, which hopefully indicates that this doesn't break things. Also tested with: bin/glean -o -v -v -v -t +texCube --quick bin/cubemap -auto from piglit. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2014-11-20i965/disasm: Properly decode branch_ctrl (gen8+)Ben Widawsky3-2/+23
Add support for decoding the new branch control bit. I saw two things wrong with the existing code. 1. It didn't bother trying to decode the bit. - While we do not *intentionally* emit this bit today, I think it's interesting to see if we somehow ended up with the bit set. It may also be useful in the future. 2. It seemed to be the wrong bit. - The docs are pretty poor wrt which bit this actually occupies. To me, it /looks/ like it should be bit 28. I am not sure where Ken got 30 from. I verified it should be 28 by looking at the simulator code. I also added the most basic support for GOTO simply so we don't need to remember to change the function in the future. v2: Move the branch_ctrl check out of the if gen >= 6 check to make it more readable. (Matt) ENDIF doesn't have branch_ctrl (Matt + Ken) Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-11-20rtasm,translate: Re-enable SSE on Mingw64.José Fonseca2-2/+2
This reverts f4dd0991719ef3e2606920c5100b372181c60899. The src/gallium/tests/unit/translate_test.c gives the same results on MinGW 64-bits as on Linux 64-bits. And since MinGW is often used for development/testing due to its convenience, it's better not to have this sort of differences relative to MSVC. Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-11-20i965: Skip _mesa_load_state_parameters when there are zero parameters.Kenneth Graunke2-11/+11
Saves a tiny bit of CPU overhead. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com> Acked-by: Eric Anholt <eric@anholt.net>
2014-11-19radeonsi: remove unused variable si_state_dsa::db_render_controlMarek Olšák1-1/+0
2014-11-19llvmpipe: enable PIPE_CAP_TGSI_VS_LAYER_VIEWPORTRoland Scheidegger1-0/+1
No changes required in the driver itself, all handled by draw. piglit results in a quick run: skip->pass 7 skip->fail 2 (The new failures in the ARB_fragment_layer_viewport group are expected, we fail the same if gs doesn't write these outputs regardless of the vs.) Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-11-19draw: fixes for vertex shaders outputting layer or viewport indexRoland Scheidegger7-17/+21
Mostly add a couple cases so we don't just check gs for this. There's only one gotcha, the built-in vp transform in the llvm vs can't handle it (this would be fixable though non-trivial due to vp index being non-constant for the SoA outputs, but we don't use it if there's a gs neither - the whole clip/vp transform integration there is suboptimal). Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-11-19st/va: surface: render subpictureMichael Varga1-0/+120
Signed-off-by: Michael Varga <Michael.Varga@amd.com>
2014-11-19st/va: subpicture implementationMichael Varga2-13/+161
added BGRA format create/destroy set image associate/deassociate Signed-off-by: Michael Varga <Michael.Varga@amd.com>
2014-11-19st/va: added internal storage for VAImage and BGRA formatMichael Varga2-26/+48
When calling vaCreateImage() an internal copy of VAImage is maintained since the allocation of "image" may not be guaranteed to live long enough. Signed-off-by: Michael Varga <Michael.Varga@amd.com>
2014-11-19st/va: added some calls to handle_table_remove()Michael Varga3-0/+3
In a few locations handles were being added but not removed. Signed-off-by: Michael Varga <Michael.Varga@amd.com>
2014-11-18i965: Fix segfault in WebGL Conformance on IvybridgeChad Versace1-3/+4
Fixes regression of WebGL Conformance test texture-size-limit [1] on Ivybridge Mobile GT2 0x0166 with Google Chrome R38. Regression introduced by commit 6c044231535b93c5d16404528946cad618d96bd9 Author: Kenneth Graunke <kenneth@whitecape.org> Date: Sun Feb 2 02:58:42 2014 -0800 i965: Bump GL_MAX_CUBE_MAP_TEXTURE_SIZE to 8192. The test regressed because the pointer offset arithmetic in intel_miptree_map_gtt() overflows for large textures. The pointer arithmetic is not 64-bit safe. [1] https://github.com/KhronosGroup/WebGL/blob/52f0dc240f04dce31b1b8e2b8107fe2b8332dc90/sdk/tests/conformance/textures/texture-size-limit.html Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org> Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=78770 Fixes: Intel CHRMOS-1377 Reported-by: Lu Hua <huax.lu@intel.com> Reviewed-by: Ian Romanic <ian.d.romanick@intel.com> Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
2014-11-18mesa/main: Fix tmp_row memory leak in texstore_rgba_integer.Siavash Eliasi1-1/+3
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2014-11-18docs/GL3: Mark GL_ARB_direct_state_access as being started by LauraJason Ekstrand1-1/+1
2014-11-19r600g: limit texture offset application to specific types (v2)Dave Airlie1-3/+18
For 1D and 2D arrays we don't want the other coordinates being offset and affecting where we sample. I wrote this patch 6 months ago but lost it. Fixes: ./bin/tex-miplevel-selection textureLodOffset 1DArray ./bin/tex-miplevel-selection textureLodOffset 2DArray ./bin/tex-miplevel-selection textureOffset 1DArray ./bin/tex-miplevel-selection textureOffset 1DArrayShadow ./bin/tex-miplevel-selection textureOffset 2DArray ./bin/tex-miplevel-selection textureOffset(bias) 1DArray ./bin/tex-miplevel-selection textureOffset(bias) 2DArray v2: rewrite to handle more cases and be consistent with code above. Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com> Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-19r600g: geom shaders: always load texture src regs from inputsDave Airlie1-1/+2
Otherwise we seem to lose the split_gs_inputs and try and pull from an uninitialised register. fixes 9 texelFetch geom shader tests. Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com> Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-18vc4: Emit semaphore instructions for new kernel ABI.Eric Anholt3-6/+87
Previously, the kernel would dispatch thread 0, wait, then dispatch thread 1. By insisting that the thread contents use semaphores in the right place, the kernel can sleep for longer by dispatching both threads at once.
2014-11-18vc4: Mark a big array as const.Eric Anholt1-1/+1
Drops 1kb of code from this inner loop, in exchange for 2.5k of data.
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