1 files changed, 41 insertions, 50 deletions

diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c
index da233203d7d..d7238762219 100644
--- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c
+++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c
@@ -22,54 +22,30 @@
 
 #include "radeon_r300.h"
 
-static void radeon_r300_add_buffer(struct r300_winsys* winsys,
-                                   struct pipe_buffer* pbuffer,
-                                   uint32_t rd,
-                                   uint32_t wd)
+static boolean radeon_r300_add_buffer(struct r300_winsys* winsys,
+                                      struct pipe_buffer* pbuffer,
+                                      uint32_t rd,
+                                      uint32_t wd)
 {
-    int i;
     struct radeon_winsys_priv* priv =
         (struct radeon_winsys_priv*)winsys->radeon_winsys;
-    struct radeon_cs_space_check* sc = priv->sc;
     struct radeon_bo* bo = ((struct radeon_pipe_buffer*)pbuffer)->bo;
 
-    /* Check to see if this BO is already in line for validation;
-     * find a slot for it otherwise. */
-    for (i = 0; i < RADEON_MAX_BOS; i++) {
-        if (sc[i].bo == bo) {
-            return;
-        } else if (sc[i].bo == NULL) {
-            sc[i].bo = bo;
-            sc[i].read_domains = rd;
-            sc[i].write_domain = wd;
-            priv->bo_count = i + 1;
-            return;
-        }
-    }
-
-    assert(FALSE && "Oh God too many BOs!");
+    radeon_cs_space_add_persistent_bo(priv->cs, bo, rd, wd);
+    return TRUE;
 }
 
 static boolean radeon_r300_validate(struct r300_winsys* winsys)
 {
-    int retval;
     struct radeon_winsys_priv* priv =
         (struct radeon_winsys_priv*)winsys->radeon_winsys;
-    struct radeon_cs_space_check* sc = priv->sc;
 
-    retval = radeon_cs_space_check(priv->cs, sc, priv->bo_count);
-
-    if (retval == RADEON_CS_SPACE_OP_TO_BIG) {
-        /* We might as well HCF, since this is not going to fit in the card,
-         * period. */
-	exit(1);
-    } else if (retval == RADEON_CS_SPACE_FLUSH) {
-        /* We must flush before more rendering can commence. */
-        return TRUE;
+    if (radeon_cs_space_check(priv->cs) < 0) {
+        return FALSE;
     }
 
     /* Things are fine, we can proceed as normal. */
-    return FALSE;
+    return TRUE;
 }
 
 static boolean radeon_r300_check_cs(struct r300_winsys* winsys, int size)
@@ -108,9 +84,15 @@ static void radeon_r300_write_cs_reloc(struct r300_winsys* winsys,
 {
     struct radeon_winsys_priv* priv =
         (struct radeon_winsys_priv*)winsys->radeon_winsys;
+    int retval = 0;
 
-    radeon_cs_write_reloc(priv->cs,
+    retval = radeon_cs_write_reloc(priv->cs,
             ((struct radeon_pipe_buffer*)pbuffer)->bo, rd, wd, flags);
+
+    if (retval) {
+        debug_printf("radeon: Relocation of %p (%d, %d, %d) failed!\n",
+                pbuffer, rd, wd, flags);
+    }
 }
 
 static void radeon_r300_end_cs(struct r300_winsys* winsys,
@@ -128,57 +110,66 @@ static void radeon_r300_flush_cs(struct r300_winsys* winsys)
 {
     struct radeon_winsys_priv* priv =
         (struct radeon_winsys_priv*)winsys->radeon_winsys;
-    int retval = 0;
+    int retval;
 
+    /* Emit the CS. */
     retval = radeon_cs_emit(priv->cs);
     if (retval) {
         debug_printf("radeon: Bad CS, dumping...\n");
         radeon_cs_print(priv->cs, stderr);
     }
+
+    /* Clean out BOs. */
+    radeon_cs_space_reset_bos(priv->cs);
+
+    /* Reset CS.
+     * Someday, when we care about performance, we should really find a way
+     * to rotate between two or three CS objects so that the GPU can be
+     * spinning through one CS while another one is being filled. */
     radeon_cs_erase(priv->cs);
 }
 
 /* Helper function to do the ioctls needed for setup and init. */
 static void do_ioctls(struct r300_winsys* winsys, int fd)
 {
-    struct drm_radeon_gem_info info;
-    drm_radeon_getparam_t gp;
-    int target;
+    struct drm_radeon_gem_info gem_info = {0};
+    struct drm_radeon_info info = {0};
+    int target = 0;
     int retval;
 
-    gp.value = &target;
+    info.value = &target;
 
     /* First, get the number of pixel pipes */
-    gp.param = RADEON_PARAM_NUM_GB_PIPES;
-    retval = drmCommandWriteRead(fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
+    info.request = RADEON_INFO_NUM_GB_PIPES;
+    retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
     if (retval) {
-        fprintf(stderr, "%s: Failed to get GB pipe count, error number %d\n",
-                __FUNCTION__, retval);
+        fprintf(stderr, "%s: Failed to get GB pipe count, "
+                "error number %d\n", __FUNCTION__, retval);
         exit(1);
     }
     winsys->gb_pipes = target;
 
     /* Then, get PCI ID */
-    gp.param = RADEON_PARAM_DEVICE_ID;
-    retval = drmCommandWriteRead(fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
+    info.request = RADEON_INFO_DEVICE_ID;
+    retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
     if (retval) {
-        fprintf(stderr, "%s: Failed to get PCI ID, error number %d\n",
-                __FUNCTION__, retval);
+        fprintf(stderr, "%s: Failed to get PCI ID, "
+                "error number %d\n", __FUNCTION__, retval);
         exit(1);
     }
     winsys->pci_id = target;
 
     /* Finally, retrieve MM info */
     retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO,
-            &info, sizeof(info));
+            &gem_info, sizeof(gem_info));
     if (retval) {
         fprintf(stderr, "%s: Failed to get MM info, error number %d\n",
                 __FUNCTION__, retval);
         exit(1);
     }
-    winsys->gart_size = info.gart_size;
+    winsys->gart_size = gem_info.gart_size;
     /* XXX */
-    winsys->vram_size = info.vram_visible;
+    winsys->vram_size = gem_info.vram_visible;
 }
 
 struct r300_winsys*